• Journal of the Korean Ceramic Society
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• v.44 no.12
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• pp.727-732
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• 2007

In order to fabricate a highly performing cathode for low-temperature type solid oxide fuel cells working at below $700^{\circ}C$, electrode microstructure control and electrode polarization measurement were performed with an electronic conductor, $La_{0.8}Sr_{0.2}MnO_3$ (LSM) and a mixed conductor, $La_{0.6}Sr_{0.4}Co_{0.2}Fe_{0.8}O_3$(LSCF). For both cathode materials, when $Sm_{0.2}Ce_{0.8}O_2$ (SDC) buffer layer was formed between the cathode and yttria-stabilized zirconia (YSZ) electrolyte, interfacial reaction products were effectively prevented at the high temperature of cathode sintering and the electrode polarization was also reduced. Moreover, cathode polarization was greatly reduced by applying the SDC sol-gel coating on the cathode pore surface, which can increase triple phase boundary from the electrolyte interface to the electrode surface. For the LSCF cathode with the SDC buffer layer and modified by the SDC sol-gel coating on the cathode pore surface, the cathode resistance was as low as 0.11 ${\Omega}{\cdot}cm^2$ measured at $700^{\circ}C$ in air atmosphere.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10C
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• pp.945-950
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• 2002

In this paper the performance evaluations on Asynchronous Transfer Mode(ATM) access node are performed in the ATM access network which consists of access node and channel. The performance factors of access node are Cell Loss Ratio(CLR), buffer capacity and delay time. Both the ATM cell-scale queueing model and burst-scale queueing model are considered as the traffic model of access node for various traffic types such as Constant Bit Rate(CBR), Variable Bit Rate(VBR) and random traffic in the ATM access networks. Based on these situations, the relation of CLR, buffer capacity and delay time is analyzed in the ATM access node.

• ETRI Journal
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• v.38 no.2
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• pp.265-271
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• 2016

We analyzed the interface characteristics of Zn-based thin-film buffer layers formed by a sulfur thermal cracker on a $Cu(In,Ga)Se_2$ (CIGS) light-absorber layer. The analyzed Zn-based thin-film buffer layers are processed by a proposed method comprising two processes - Zn-sputtering and cracker-sulfurization. The processed buffer layers are then suitable to be used in the fabrication of highly efficient CIGS solar cells. Among the various Zn-based film thicknesses, an 8 nm-thick Zn-based film shows the highest power conversion efficiency for a solar cell. The band alignment of the buffer/CIGS was investigated by measuring the band-gap energies and valence band levels across the depth direction. The conduction band difference between the near surface and interface in the buffer layer enables an efficient electron transport across the junction. We found the origin of the energy band structure by observing the chemical states. The fabricated buffer/CIGS layers have a structurally and chemically distinct interface with little elemental inter-diffusion.

• Journal of KIISE:Information Networking
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• v.29 no.2
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• pp.181-187
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• 2002

Connection admission control(CAC), which decides whether or not to accept a new call request, is one of the most Important preventive congestion control techniques in asynchronous transfer mode(ATM) networks. To develop a practical CAC scheme, first we propose a "Modified Cell Loss Probability MP${\nu}"$, which is based on "Virtual Cell Loss Probability P${\nu}"$, taking into account mean burst duration of input traffic source and buffer size in ATM networks. MP${\nu}"$ computes more accurate cell loss probability than P${\nu}"$ without increasing computational complexity, since P${\nu}"$ is formulated simply form the maximum and the average cell rate of input traffic. P${\nu}"$ is overestimated as compared to the real cell loss probability when the mean burst duration is relatively small to the buffer capacity. Then, we Propose a CAC scheme, based on "Modified Virtual Bandwidth(MVB)" method, which may individualize the cell loss probabilities in heterogeneous traffic environments. For the proposed approach, we define the interference intensity to identify interferences between heterogeneous traffic sources and use it as well as MP${\nu}"$ to compute MVB. Our approach is well suitable for ATM networks since it provides high bandwidth utilization and guarantees simple and real time CAC computation for heterogeneous traffic environments.heterogeneous traffic environments.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.11
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• pp.25-33
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• 1997

The end-to-end rate-based control mechanism is used for the flow control of the ABR service to allow much more flexibility in ATM switching system. To accommodate the ABR service effciently many algorithms such as EFCI, EPRCA, ERICA, and CAPC2 have been proposed for the switch algorithm. ABR cells and related RM cells are received at the ATM switch fabric transparently without any processing. And then cells received from the traffic source are queued in the ABR buffer of switching system. The ABR buffer usually has some thresholds for easy congestion control signal transmission. Whatever we use, therefore, these can be many ABR traffic control algorithms to implement the ABR transfer capability. The genertion of congestion indicate signal for ABR control algorithms is determined by ABR buffer satus. And ABR buffer status is determined by ABR cells transfer ratio in ATM switch fabrics. In this paper, we presented the functional structures for control of the ABR traffic capability, proposed the readout scheduling, cell slot allocation of output link and the buffer allocation model for effective ABR traffic guranteeing with considering CBR/VBR traffics in ATM switch. Since the proposed readout scheduling scheme can provide more avaliable space to ABR buffer than existing readout scheduling scheme, generation rate of a SEND signal, that is, BCN signal in destination node can be increased for ABR call connection. Therefore, the proposed scheme, in this paper, can be appropriate as algorithm for effective ABR traffic service on output link of ATM switching node.

• The KIPS Transactions:PartC
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• v.13C no.7 s.110
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• pp.889-896
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• 2006

ATM Forum has defined a guaranteed frame rate (GFR) service to serve Internet traffic efficiently. The GFR service provides virtual connections (VCs) for minimum cell rate (MCR) guarantees and allows them to fairly share the residual bandwidth. And ATM Forum has recommended a frame-based generic cell rate algorithm (F-GCRA) as a frame classifier, which determines whether an Am cell is eligible to use the guaranteed bandwidth in a frame level. An ATM switch accommodates cells in its buffer or drops them in a frame level according to current buffer occupancy. A FIFO shared buffer has so simple structure as to be feasibly implemented in switches, but has not been able to provide an MCR guarantee for each VC without buffer management based on per-VC accounting. In this paper, we enhance the F-GCRA frame classifier to guarantee an MCR of each VC without buffer management based on per-VC accounting. The enhanced frame classifier considers burstness of TCP traffic caused by congestion control algorithm so as to enable each VC to use its reserved bandwidth sufficiently. In addition, it is able to alleviate the unfairness problem in usage of the residual bandwidth. Simulation results show that the enhanced frame classifier satisfies quality of services (QoSs) of the GFR service for the TCP traffic.

• The Journal of the Korea Contents Association
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• v.2 no.4
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• pp.85-92
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• 2002

This paper proposes the cell scheduling algorithm proper to high-speed ATM switch. The proposed algorithm is the VRR(Variable weight Round Robin) combined the FRR to variant QLT. The FRR performs the cell service of the fixed weight by each buffer. So, FRR don't support the QoS of ATM service classes although it is easy to implement a high speed switch. VRR uses the method expaned to variable weight according to buffer state as well as schedules the cell according the Fixed weight based FRR. The simulation to evaluate the proposed algorithm was done by AweSim arid Visual C++. The result graphs show that the proposed algorithm is excellent, especially in the aspect of cell loss. This area is engaged by English Abstract.

• Transactions on Electrical and Electronic Materials
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• v.13 no.1
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• pp.43-46
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• 2012

Organic solar cell devices were fabricated using poly[9-(1-octylnonyl)-9H-carbazole-2.7-diyl]-2.5-thiophenediyl-2.1.3-benzothiadiazole-4.7-diyl-2.5-thiophenediyl] PCDTBT/ [6,6]-phenyl $C_{71}$ butyric acid methyl ester (PC71BM) active layer deposited by spin coating. Moreover, the relationship between solar cell performance and buffer layer thickness was investigated by spin coating speed and AFM imaging of the buffer layer surface. The performance of the organic solar cell with spin-coated active layer was then evaluated, and the power conversion efficiency of the solar cell was determined to be > 5%.

• The Journal of Information Technology
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• v.1 no.2
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• pp.65-79
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• 1998

In this thesis, a buffer alloction and management algorithm is proposed in order to satisfy the QoS of CBR/VBR traffics incomming to ATM networks. Proposed traffic menagement algorithm is based on the route seperation mechanism that allocates buffers acoording to traffic characterics, and sets threshold to allocated buffers. We developed a cell scheduling algorithm and evaluated cell delay and loss probability characteristics according to incomming traffic classes. The cell scheduling algorithm uses buffer size thresholds to control overload traffic flow.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.9
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• pp.1209-1218
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• 1995

In this paper, we develope an ATM switch simulator in order to evaluate the HAN/B-ISDN ATM switch currently being developed by ETRI. It models the basic cell switching functions of the target ATM switch with priority control and multicasting features and it also supports such various traffic models as random or bursty traffic, balanced or unbalanced traffic, multicast traffic models. Using this simulator, we can evaluate the performances of the ATM switch in terms of various performance indices, i.e. cell delay, cell loss probability, etc., and this simulator can be utilized in the system parameter tunings such as the common buffer size and address buffer size.