• Title/Summary/Keyword: Capacitor design method

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Design of 9 kJ/s High Voltage LiPo Battery based 2-stage Capacitor Charger (배터리 기반 2단 충전 9 kJ/s 고전압 충전기 설계)

  • Cho, Chan-Gi;Jia, Ziyi;Ryoo, Hong-Je
    • The Transactions of the Korean Institute of Power Electronics
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    • v.24 no.4
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    • pp.268-272
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    • 2019
  • A lithium polymer battery-based 9 kJ/s high-voltage capacitor charger, which comprises two stages, is proposed. A modified LCC resonant converter and resonant circuit are introduced at the first and second stages, respectively. In the first stage, the methods for handling low-voltage and high-current batteries are considered. Delta-wye three-phase transformers are used to generate a high output voltage through the difference between the phase and line-to-line voltages. Another method is placing the series resonant capacitor of the LCC resonant components on the transformer secondary side, which conducts considerably low current compared with the transformer primary side. On the basis of the stable operation of the first charging stage, the secondary charging stage generates final output voltage by using the resonance. This additional stage protects the rectifying diodes from the negative voltage when the output capacitor is discharged for a short time. The inductance and capacitance of the resonance components are selected by considering the resonance charging time. The design procedure for each stage with the aforementioned features is suggested, and its performance is verified by not only simulation but also experimental results.

Design of monolithic DC-DC Buck converter with on chip soft-start circuit (온칩 시동회로를 갖는 CMOS DC-DC 벅 변환기 설계)

  • Park, Seung-Chan;Lim, Dong-Kyun;Lee, Sang-Min;Yoon, Kwang-Sub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.7A
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    • pp.568-573
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    • 2009
  • This paper presents a step-down DC-DC converter with On-chip Compensation for battery-operated portable electronic devices which are designed in O.13um CMOS standard process. In an effort to decrease system volume, this paper proposes the on chip compensation circuit using capacitor multiplier method. Capacitor multiplier method can minimize error amplifier's compensation capacitor size by 10%. It allows the compensation block of DC-DC converter be easily integrated on a chip and occupy less layout area. But capacitor multiplier operation reduces DC-DC converter efficiency. As a result, this converter shows maximum efficiency over 87.2% for the output voltage of 1.2V (input voltage : 3.3V), maximum load current 500mA, and 25mA output ripple current. This voltage mode controled buck converter has 1MHz switching frequency.

A Study on the Embedded Capacitor for PCB (PCB용 임베디드 캐패시터에 관한 연구)

  • Hong, Soon-Kwan
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.42 no.4
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    • pp.1-6
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    • 2005
  • Recently embedded passive technology which fabricate passive elements such as resistors and capacitors at the inner layer of PCB(Printed Circuit Board) is used to make high performance IT products. However, embedded capacitor has limit in full range circuit applications because of the low capacitance density. In this paper, a new embedded capacitor which has wrinkled electrodes and dielectric layer was proposed to overcome the limits. FEM(Finite Elements Method) technique was used to evaluate capacitance density of the wrinkled type embedded capacitor. Capacitance density of the wrinkled type embedded capacitor is larger than that of conventional planar type embedded capacitor by about 25.6%$\sim$39.6%. In case of thin film type embedded capacitor, proposed wrinkled structure has more enhanced effect on the capacitance density.

Simplified Controller Design Method for Digitally Controlled LCL-Type PWM Converter with Multi-resonant Quasi-PR Controller and Capacitor-Current-Feedback Active Damping

  • Lyu, Yongcan;Lin, Hua
    • Journal of Power Electronics
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    • v.14 no.6
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    • pp.1322-1333
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    • 2014
  • To track the sinusoidal current under stationary frame and suppress the effects of low-order grid harmonics, the multi-resonant quasi-proportional plus resonant (PR) controller has been extensively used for digitally controlled LCL-type pulse-width modulation (PWM) converters with capacitor-current-feedback active damping. However, designing the controller is difficult because of its high order and large number of parameters. Moreover, the computation and PWM delays of the digitally controlled system significantly affect damping performance. In this study, the delay effect is analyzed by using the Nyquist diagrams and the system stability constraint condition can be obtained based on the Nyquist stability criterion. Moreover, impact analysis of the control parameters on the current loop performance, that is, steady-state error and stability margin, identifies that different control parameters play different decisive roles in current loop performance. Based on the analysis, a simplified controller design method based on the system specifications is proposed. Following the method, two design examples are given, and the experimental results verify the practicability and feasibility of the proposed design method.

A Study on the Design of Single-Phase Capacitor-Run Induction Motor (콘덴서형 단상 유도전동기의 설계에 관한 연구)

  • Kim, Bok-Ki;Park, Jun-Suk;Chung, Tae-Kyung
    • Proceedings of the KIEE Conference
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    • 1996.07a
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    • pp.121-123
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    • 1996
  • Capacitor-run motor has a capacitor id series with the auxiliary winding for normal running connections. After the shape of stator and rotor are determined, the motor is designed with variables such as winding distributions or capacitance except punching variables. In this paper, the winding distribution and the turn ratio was taken as design variables because the winding distribution affects the torque and efficiency. And capacitance was selected as an additional variable. Simulation results show the validity of proposed method.

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Output LC Filter Design of Voltage Source Inverter Considering the Performance of Controller (제어기응답을 고려한 전압형 인버터의 출력 LC필터 설계)

  • Kim, Jae-Sig;Choi, Jae-Ho
    • Proceedings of the KIEE Conference
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    • 2000.07b
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    • pp.1077-1079
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    • 2000
  • In this paper. the design procedure of the inverter output filter is described. The transfer function of the filter output voltage to the load current is described with the capacitor value and the system time constant including the controller. This means that the relation between the filter capacitor value and the system time constant is given as the closed form. By using the above closed form. the capacitor value can be calculated with the system time constant which can be implemented practically not using the try and error method. And as the effect of the load current to the voltage distortion can be calculated from the closed form, it can be verified how much the voltage distortion is effected when the nonlinear load is connected.

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Design of Input Output Filter of Uninterruptible Power Supply (무정전전원장치(UPS)의 입출력필터설계에 관한 연구)

  • Kim, Je-Hong;Cho, Yang-Heang;Son, Jae-Hyun
    • Proceedings of the KIEE Conference
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    • 2005.10a
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    • pp.132-135
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    • 2005
  • A design for the input filter and the output filter of a single-phase uninterruptible power supply (UPS) system is proposed. A filter design example is presented. And also, this dissertation describes a reduction of the DC voltage ripple of a single-phase UPS. The input power of proposed UPS fluctuates with twice frequency of the utility source, which causes DC voltage fluctuation. The reduction of the DC voltage fluctuation requires a large DC link capacitor. The proposed method uses a LC series resonant filter paralleled with a conventional smoothing capacitor. The effectiveness of the proposed method was confirmed by simulation results.

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A New Optimal Design Method of the Electronic Ballast for MHL with Stable Run-up Current (시동전류 제한을 통한 메탈헬라이드 램프용 안정기의 최적 설계)

  • Lim, Byoung-Loh;Jang, Mog-Soon;Lim, Ki-Seung;Park, Chong-Yeun
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.3
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    • pp.409-415
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    • 2008
  • This paper proposed a new optimal design method of the electronic ballast with stable run-up current for Metal Halide lamp during the ignition condition. In order to avoid operation in the acoustic resonance frequency band and to supply the optimal ignition current without demage of inverter switching components during the ignition period, the values of the series inductor Ls, the series capacitor Cs, and the parallel capacitor Cp were determined by analysis of characteristics of inverter transfer function depend on Lamp operating power and resistance of ignition condition and steady state operating condition. For the prototype ballast for a 400W Metal Halide Lamp, experimental results are presented in order to validate the proposed method.

Characteristics Analysis of Magnetizing Circuit and Fixture considering Temperature Characteristic (온도특성을 고려한 착자회로 및 요크의 특성 해석)

  • Baek, Soo-Hyun;Maeng, In-Jae;Kim, Pill-Soo;Kim, Cherl-Jin
    • Proceedings of the KIEE Conference
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    • 1993.11a
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    • pp.82-84
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    • 1993
  • A method for simulating general characteristics and temperature characteristics of magnetizing fixture coil of the capacitor discharge impulse magnetizer-magnetizing fixture system using SPICE is presented. This method has been developed which can aid the design, understanding and inexpensive, time-saving of magnetizing circuit. As the detailed characteristics of magnetizing circuit can be obtained, the efficient design of the magnetizing circuit which produce desired magnet will be possible using our SPICE modeling. Especially, The knowledge of the temperature of the magnetizing fixture is very important to forecast the characteristics of the magnetizing circuits tinder different conditions. The capacitor voltage was not raised above 810[V] to protect the magnetizing fixture from excessive heating. The temperature estimation method uses multi-lumped model with equivalent thermal resistance and thermal capacitance.

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Development of Dynamic Voltage Restorer System Considering Characteristics of EDLC (EDLC의 특성을 고려한 동적전압보상시스템의 개발)

  • Lee, Sang-Cheol;Seo, Il-Dong
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.59 no.3
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    • pp.288-292
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    • 2010
  • Recently, in energy storage system, the EDLC is paid attention as a new environmentally friendly energy storage element. This capacitor has higher energy density than the electrolytic capacitor. Also, this capacitor has a lot of advantage such as no maintenance, longer life cycle and faster charge-discharge time than the battery system. But the EDLC must have a each charge-discharge controller to effectively control, an energy design method circuit to use effectively energy, and several compensation techniques to control a optimal operating. In this respect, this study suggests major parameters to effectively represent the characteristics of EDLC, the measurement methods of those parameters have been investigated with experiments, and the interpretation about the buck/boost DC/DC converter for the operation of EDLC.