• Journal of KIISE:Databases
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• v.27 no.1
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• pp.53-63
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• 2000

The mobile computing service market is increasing rapidly due to the development of low-cost wireless network technology and the high-performance mobile computing devices. In recent years, several methods have been proposed to effectively deal with restrictions of the mobile computing environment such as limited bandwidth, frequent disconnection and short-lived batteries. Amongst those methods, much study is being done on the caching method - among the data transmitted from a mobile support station, it selects those that are likely to be accessed in the near future and stores them in the local cache of a mobile host. Existing cache replacement methods have some limitations in efficiency because they do not take into consideration the characteristics of user mobility and spatial attributes of geographical data. In this paper, we show that the value and the semantic of the data, which are stored in the cache of a mobile host, changes according to the movement of the mobile host. We argue it is because data that are geographically near are better suited to provide an answer to a users query in the mobile environment. Also, we define spatial location of geographical data has effect on, using the spatial attributes of data. Finally, we propose two new cache replacement methods that efficiently support user mobility and spatial attributes of data. One is based on the location of data and the other on the meaningful region of data. From the comparative analysis of the previous methods and that they improve the cache hit ratio. Also we show that performance varies according to data density using this, we argue different cache replacement methods are required for regions with varying density of data.

• The Transactions of the Korea Information Processing Society
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• v.5 no.10
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• pp.2686-2703
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• 1998

The widening pClformnnce gap between processor and memory causes an emergence of the promising architecture, processor-memory (PM) integration In this paper, various design issues for P-M integration are studied, First, an analytical model of the DRAM access time is constructed considering both the bank conflict ratio and the DRAM page hit ratio. Then the points of both the performance improvement and the perfonnance bottle neck are found by the proposed model as designing on-chip DRAM architectures. This paper proposes the new architecture, called the delayed precharge bank architecture, to improve the perfonnance of memory system as increasing the DRAM page hit ratio. This paper also adapts an efficient bank interleaving mechanism to the proposed architecture. This architecture is verified !II he better than the hierarchical multi-bank architecture as well as the conventional bank architecture by executiun driven simulation. Eight SPEC95 benchmarks are used for simulation as changing parameters for the cache architecture, the number of DRAM banks, and the delayed time quantum.

• ETRI Journal
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• v.36 no.1
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• pp.134-140
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• 2014

Many reports have shown that the access pattern for geospatial tiles follows Zipf's law and that its parameter ${\alpha}$ represents the access characteristics. However, visits to geospatial tiles have temporal and spatial popularities, and the ${\alpha}$-value changes as they change. We construct a mathematical model to simulate the user's access behavior by studying the attributes of frequently visited tile objects to determine parameter estimation algorithms. Because the least squares (LS) method in common use cannot obtain an exact ${\alpha}$-value and does not provide a suitable fit to data for frequently visited tiles, we present a new approach, which uses a moment method of estimation to obtain the value of ${\alpha}$ when ${\alpha}$ is close to 1. When ${\alpha}$ is further away from 1, the method uses the associated cache hit ratio for tile access and uses an LS method based on a critical cache size to estimate the value of ${\alpha}$. The decrease in the estimation error is presented and discussed in the section on experiment results. This new method, which provides a more accurate estimate of ${\alpha}$ than earlier methods, promises more effective prediction of requests for frequently accessed tiles for better caching and load balancing.

• Journal of KIISE:Computer Systems and Theory
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• v.27 no.4
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• pp.420-430
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• 2000

Several caching schemes for realtime multimedia systems have been proposed, but they focus only on increasing the hit ratio without providing any means to utilize the saved disk bandwidth due to cache hits. One of the most important metrics in multimedia systems is the number of clients that the systems can service simultaneously guaranteeing Quality of Service(QoS). Preemptive but Safe Interval Caching(PSIC) was proposed as a caching scheme which makes it possible to provide deterministic QoS.. However, it has no ability to adapt to the change of system environments since it has no mechanism to change the cache size. In this paper, we present a new caching scheme, Dynamic Interval Caching(DIC), which maximizes the performance, regardless of the change of system environments, providing hiccup-free service, by managing memory buffers dynamically. And it is demonstrated that DIC allocates buffer cache optimally, by comparing with PSIC through trace-driven simulations.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.1
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• pp.183-189
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• 2018

This paper proposes distributed file placement and coverage expansion techniques for mitigating the traffic bottleneck in backhaul for small-cell networks. In order to minimize the backhaul load with limited memory space, the proposed scheme controls the coverage and file placement of base station according to file popularity distribution and memory space of base stations. In other words, since the cache hit ratio is low when there is small memory capacity or widespread file popularity distribution, the base stations expand its coverage and cache different set of files for the user located in overlapped area to exploit multiple cached file sets of base stations. Our simulation results show that the proposed scheme outperforms the conventional cache strategy in terms of network throughput when there is small memory capacity or widespread file popularity distribution.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.2
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• pp.178-188
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• 2016

The traffic in the wired and wireless networks has increased exponentially because of increase of smart phone and improvement of PC performance. Multimedia services and file transmission such as Facebook, Youtube occupy a large part of the traffic. CDN is a technique that duplicates the contents on a remote web server of content provider to local CDN servers near clients and chooses the optimal CDN server for providing the content to the client in the event of a content request. In this paper, the content request message between CDN servers and the client used the SCRP algorithm utilizing the MST algorithm and the traffic throughput was optimized. The average response time for the content request is reduced by employing HC_LRU cache algorithm that improves the cache hit ratio. The proposed SCRP and HC_LRU algorithm may build a scalable content delivery network system that efficiently utilizes network resources, achieves traffic localization and prevents bottlenecks.

• ETRI Journal
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• v.10 no.3
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• pp.83-91
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• 1988

This paper describes the architecture and the performance analysis of a multiprocessor system, which is based on the shared memory and single system bus. The system bus provides the pended protocol for the multiprocessor environment. Analyzing the processor utilization, address/data bus utilization and memory conflicts, we use a simulation model. The hit ratio of private cache memory is a major factor on the linear increase of the performance of a shared memory based multiprocessor system.

• Proceedings of the Korean Statistical Society Conference
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• 2003.05a
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• pp.13-17
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• 2003

본 논문에서는 낮은 대역폭, 높은 지연, 그리고 잦은 네트워크 단절로 인한 모바일 컴퓨팅 환경의 문제점들을 해결하기 위한 효과적인 캐시 적재 기법으로서 협업 추천 기반의 데이터 마이닝 전략을 제안하였다. 캐시 적재가 모바일 클라이언트의 이러한 문제점들을 해결하기 위한 효율적인 방법이 된다는 기존의 연구는 많이 진행되어 왔다. 하지만 모바일 컴퓨터의 요구에 대한 이력 정보만을 이용한 기존의 연구는 모바일 클라이언트가 필요로 하는 모든 정보 요구를 만족하지 못하였다. 특히 저장 공간의 제약을 갖는 모바일 컴퓨터의 한계 때문에 더욱 큰 어려움을 갖게 되었다. 본 연구에서는 모바일 클라이언트의 이력 정보에 대하여 데이터 마이닝 기법을 적용한 캐시 적재 기법을 제안하여 적은 캐시 용량만으로도 모바일 클라이언트의 요구를 만족할 수 있는 아이템들을 효과적으로 서비스할 수 있도록 하였다. CSIM Simulator를 이용하여 모의 데이터를 생성하여, 제안 모형의 성능 평가를 위한 실험을 수행하였다. Cache hit ratio를 이용한 객관적인 성능 평가를 통하여 제안된 모형이 모바일 클라이언트의 캐시 적재 기법으로서 우수한 성능을 보임이 확인되었다.

• Proceedings of the Korean Information Science Society Conference
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• 2001.04a
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• pp.352-354
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• 2001

효율적인 웹 캐쉬 교체 알고리즘을 통해 웹 서버와 네트워크의 부하를 감소시킬 수 있으며, 이에 따라 사용자가 요청한 문서에 대한 응답시간과 지연시간을 효과적으로 개선시킬 수 있다. 기존에 연구된 교체 알고리즘 중 LRU-SIZE와 LRU-MIN 기법은 일차적으로 캐슁된 문서의 크기에 따라 교체를 하고 크기가 똑같은 경우에 한해서 LRU를 적용하여 교체를 한다. 그러나 LRU-SIZE와 LRU-MIN에 의해서 캐슁된 문서를 교체를 하면 크기의 차이가 크지 않으면서 자주 요청되는 문서가 교체될 수 있다. 본 논문에서는 캐슁된 문서 크기의 로그화에 따라 구성된 그룹에서 자주 요청되지 않는 문서를 교체하는 알고리즘을 제안한다. 로그화를 통해 크기의 차이가 적은 문서들이 같은 그룹으로 설정되어 비교되기 때문에 자주 요청되는 문서들이 크기의 차이가 적은 문서에 의해 교체되는 것을 막을 수 있다. 성능 평가를 통해 제안한 교체 알고리즘이 다른 기법에 비해 높은 hit ratio를 나타냄을 보여준다.

• Journal of KIISE:Databases
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• v.30 no.6
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• pp.629-640
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• 2003

A shared disk (SD) cluster couples multiple nodes for high performance transaction processing, and all the coupled nodes share a common database at the disk level. In the SD cluster, a transaction routing corresponds to select a node for an incoming transaction to be executed. An affinity-based routing can increase local buffer hit ratio of each node by clustering transactions referencing similar data to be executed on the same node. However, the affinity-based routing is very much non-adaptive to the changes in the system load, and thus a specific node will be overloaded if transactions in some class are congested. In this paper, we propose a dynamic transaction routing scheme that can achieve an optimal balance between affinity-based routing and dynamic load balancing of all the nodes in the SD cluster. The proposed scheme is novel in the sense that it can improve the system performance by increasing the local buffer hit ratio and reducing the buffer invalidation overhead.