• Title/Summary/Keyword: CVC(capacitance to voltage converter)

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A Compact and Fast Measurement System for the Detection of Small Capacitance

  • Youngshin Woo;Sung, Man-Young
    • Transactions on Electrical and Electronic Materials
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    • v.2 no.1
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    • pp.16-21
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    • 2001
  • A new technique to measure low level capacitance variations of a gyroscope is proposed. It is based on the improved CVC(capacitance to voltage converter) biased by a d.c. current source and the peak detector without any low pass filter. This setup of the measurement system makes it possible to provide higher speed of measurement and wide operation range. The d,c, drift of the conventional CVC and stray capacitances are automatically compensated. Key parameters that affect the performance of the measurement system are illustrated and computer simulation results are presented. The demonstrated measurement system for micromachined gyroscope applications shows a linearity of 0.99972 and a resolution of 0.67fF from 10 fF to 120 fF at 10 kHz.

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CMOS ROIC for MEMS Acceleration Sensor (MEMS 가속도센서를 위한 CMOS Readout 회로)

  • Yoon, Eun-Jung;Park, Jong-Tae;Yu, Chong-Gun
    • Journal of IKEEE
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    • v.18 no.1
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    • pp.119-127
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    • 2014
  • This paper presents a CMOS readout circuit for MEMS(Micro Electro Mechanical System) acceleration sensors. It consists of a MEMS accelerometer, a capacitance to voltage converter(CVC) and a second-order switched-capacitor ${\Sigma}{\Delta}$ modulator. Correlated-double-sampling(CDS) and chopper-stabilization(CHS) techniques are used in the CVC and ${\Sigma}{\Delta}$ modulator to reduce the low-frequency noise and DC offset. The sensitivity of the designed CVC is 150mV/g and its non-linearity is 0.15%. The duty cycle of the designed ${\Sigma}{\Delta}$ modulator output increases about 10% when the input voltage amplitude increases by 100mV, and the modulator's non-linearity is 0.45%. The total sensitivity is 150mV/g and the power consumption is 5.6mW. The proposed circuit is designed in a 0.35um CMOS process with a supply voltage of 3.3V and a operating frequency of 2MHz. The size of the designed chip including PADs is $0.96mm{\times}0.85mm$.

A CMOS Switched-Capacitor Interface Circuit for MEMS Capacitive Sensors (MEMS 용량형 센서를 위한 CMOS 스위치드-커패시터 인터페이스 회로)

  • Ju, Min-sik;Jeong, Baek-ryong;Choi, Se-young;Yang, Min-Jae;Yoon, Eun-jung;Yu, Chong-gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.569-572
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    • 2014
  • This paper presents a CMOS switched-capacitor interface circuit for MEMS capacitive sensors. It consist of a capacitance to voltage converter(CVC), a second-order ${\Sigma}{\Delta}$ modulator, and a comparator. A bias circuit is also designed to supply constant bias voltages and currents. This circuit employes the correlated-double-sampling(CDS) and chopper-stabilization(CHS) techniques to reduce low-frequency noise and offset. The designed CVC has a sensitivity of 20.53mV/fF and linearity errors less than 0.036%. The duty cycle of the designed ${\Sigma}{\Delta}$ modulator output increases about 5% as the input voltage amplitude increases by 100mV. The designed interface circuit shows linearity errors less than 0.13%, and the current consumption is 0.73mA. The proposed circuit is designed in a 0.35um CMOS process with a supply voltage of 3.3V. The size of the designed chip including PADs is $1117um{\times}983um$.

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CMOS Interface Circuit for MEMS Acceleration Sensor (MEMS 가속도센서를 위한 CMOS 인터페이스 회로)

  • Jeong, Jae-hwan;Kim, Ji-yong;Jang, Jeong-eun;Shin, Hee-chan;Yu, Chong-gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.221-224
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    • 2012
  • This paper presents a CMOS interface circuit for MEMS acceleration sensor. It consists of a capacitance to voltage converter(CVC), a second-order switched-capacitor (SC) integrator and comparator. A bandgap reference(BGR) has been designed to supply a stable bias to the circuit and a ${\Sigma}{\Delta}$ Modulator with chopper - stabilization(CHS) has also been designed for more suppression of the low frequency noise and offset. As a result, the output of this ${\Sigma}{\Delta}$ Modulator increases about 10% duty cycle when the input voltage amplitude increases 100mV and the sensitivity is x, y-axis 0.45v/g, z-axis 0.28V/g. This work is designed and implemented in a 0.35um CMOS technology with a supply voltage of 3.3V and a sampling frequency of 3MHz sampling frequency. The size of the designed chip including PADs is $0.96mm{\times}0.85mm$.

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