• Title/Summary/Keyword: CPU(Central processing unit)

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Precise Air-Fuel Ratio Control on Transient Conditions with the PC-ECU in SI Engine (PC-ECU를 이용한 SI 기관의 비정상상태 정밀공연비 제어)

  • Yoon, S.H.
    • Journal of ILASS-Korea
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    • v.5 no.3
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    • pp.9-16
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    • 2000
  • In a SI engine, three-way catalyst converter has the best efficiency when A/F ratio is near the stoichiometry. The feedback control using oxygen sensors in the commercial engine has limits caused by the system delays. So it is necessary to control fuel quantity in accordance with intake air amount in order to reduce exhaust emission and improve the specific fuel consumption. Precise A/F ratio control requires measurement of air amount with respect to the cylinder and injection fuel according to the air amount In this paper, we applied nonlinear fuel injection model and developed the algorithm of A/F ratio control. This algorithm includes the methods of measurement of transient air mass flowing into each cylinder, of calculation of injection pulse width for measured air mass, and the method of feedback and engine control by using lambda sensor. Also we developed control program for IBM-PC by using C++ Builder, and tested it in the commercial engine.

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Optimization of Graph Processing based on In-Storage Processing (스토리지 내 프로세싱 방식을 사용한 그래프 프로세싱의 최적화 방법)

  • Song, Nae Young;Han, Hyuck;Yeom, Heon Young
    • KIISE Transactions on Computing Practices
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    • v.23 no.8
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    • pp.473-480
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    • 2017
  • In recent years, semiconductor-based storage devices such as flash memory (SSDs) have been developed to high performance. In addition, a trend has been observed of optimally utilizing resources such as the central processing unit (CPU) and memory of the internal controller in the storage device according to the needs of the application. This concept is called In-Storage Processing (ISP). In a storage device equipped with the ISP function, it is possible to process part of the operation executed on the host system, thus reducing the load on the host. Moreover, since the data is processed in the storage device, the data transferred to the host are reduced. In this paper, we propose a method to optimize graph query processing by utilizing these ISP functions, and show that the optimized graph processing method improves the performance of the graph 500 benchmark by up to 20%.

The efficient implementation of the multi-channel active noise controller using a low-cost microcontroller unit (저가 microcontoller unit을 이용한 효율적인 다채널 능동 소음 제어기 구현)

  • Chung, Ik Joo
    • The Journal of the Acoustical Society of Korea
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    • v.38 no.1
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    • pp.9-22
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    • 2019
  • In this paper, we propose a method that can be applied to the efficient implementation of multi-channel active noise controller. Since the normalized MFxLMS (Modified Filtered-x Least Mean Square) algorithm for the multi-channel active noise control requires a large amount of computation, the difficulty has lied in implementing the algorithm using a low-cost MCU (Microcontoller Unit). We implement the multi-channel active noise controller efficiently by optimizing the software based on the features of the MCU. By maximizing the usage of single-cycle MAC (Multiply- Accumulate) operations and minimizing move operations of the delay memory, we can achieve more than 3 times the performance in the aspect of computational optimization, and by parellel processing using the auxillary processor included in the MCU, we can also obtain more than 4 times the performance. In addition, the usage of additional parts can be minimized by maximizing the usage of the peripherals embedded in the MCU.

Low-Complexity Deeply Embedded CPU and SoC Implementation (낮은 복잡도의 Deeply Embedded 중앙처리장치 및 시스템온칩 구현)

  • Park, Chester Sungchung;Park, Sungkyung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.3
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    • pp.699-707
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    • 2016
  • This paper proposes a low-complexity central processing unit (CPU) that is suitable for deeply embedded systems, including Internet of things (IoT) applications. The core features a 16-bit instruction set architecture (ISA) that leads to high code density, as well as a multicycle architecture with a counter-based control unit and adder sharing that lead to a small hardware area. A co-processor, instruction cache, AMBA bus, internal SRAM, external memory, on-chip debugger (OCD), and peripheral I/Os are placed around the core to make a system-on-a-chip (SoC) platform. This platform is based on a modified Harvard architecture to facilitate memory access by reducing the number of access clock cycles. The SoC platform and CPU were simulated and verified at the C and the assembly levels, and FPGA prototyping with integrated logic analysis was carried out. The CPU was synthesized at the ASIC front-end gate netlist level using a $0.18{\mu}m$ digital CMOS technology with 1.8V supply, resulting in a gate count of merely 7700 at a 50MHz clock speed. The SoC platform was embedded in an FPGA on a miniature board and applied to deeply embedded IoT applications.

Depth-hybrid speeded-up robust features (DH-SURF) for real-time RGB-D SLAM

  • Lee, Donghwa;Kim, Hyungjin;Jung, Sungwook;Myung, Hyun
    • Advances in robotics research
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    • v.2 no.1
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    • pp.33-44
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    • 2018
  • This paper presents a novel feature detection algorithm called depth-hybrid speeded-up robust features (DH-SURF) augmented by depth information in the speeded-up robust features (SURF) algorithm. In the keypoint detection part of classical SURF, the standard deviation of the Gaussian kernel is varied for its scale-invariance property, resulting in increased computational complexity. We propose a keypoint detection method with less variation of the standard deviation by using depth data from a red-green-blue depth (RGB-D) sensor. Our approach maintains a scale-invariance property while reducing computation time. An RGB-D simultaneous localization and mapping (SLAM) system uses a feature extraction method and depth data concurrently; thus, the system is well-suited for showing the performance of the DH-SURF method. DH-SURF was implemented on a central processing unit (CPU) and a graphics processing unit (GPU), respectively, and was validated through the real-time RGB-D SLAM.

A Study on the Distributed Control System and Application (분산제어시스템의 구축과 응용사례에 관한 연구)

  • 윤형득;신현식
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2001.10a
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    • pp.552-555
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    • 2001
  • From the dissertation which it sees micro it is strong with the technical development which the computer and communication field is quick and efficiency improvement and control LAN (Local Area Network) this utility anger becomes with the pliability regarding a system construction to come to be high, central processing unit (CPU) function it separates especially and the LAN communication railway line (Data way) it uses and the controller royal tomb of process disperses, the information control and watch and operation fabrication function composes an anger making whole system intensively development background and application process and the right season of the dispersion control system which plans a reliability improvement, war potential and environment, possibility control, From industrial site of the petrochemistry back application and it investigated the dispersion control system which is applied to observe in many sidedness and until course of development of report hereafter dispersion control system it tried.

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Control Mechanism of a Set-Top Box in Standby State for Power Saving (전력소모 저감을 위한 대기상태의 셋톱박스를 제어하는 방안)

  • Park, Hyunho;Byon, Sungwon;Jung, Eui Suk;Park, Young-Su;Lee, Yong-Tae;Ryu, Won
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2015.07a
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    • pp.46-48
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    • 2015
  • 본 논문은 외부 전원에 연결되었지만 본래의 용도(예: 셋톱박스인 경우 방송서비스 제공)로 사용되지 않는 대기상태에서도 기존 셋톱박스처럼 업데이트를 수행하면서도 기존의 셋톱박스에 비해 전력소모를 줄일 수 있는, 대기상태의 셋톱박스를 제어하는 방안을 제안한다. 본 논문의 제어방안은 셋톱박스로 전달되는 CPU 활성화 메시지를 이용하거나 메시지의 프로토콜의 일부만 분석하는 방법을 이용하여 셋톱박스 업데이트 필요 유무를 판별하는 방안으로 이는 낮은 CPU(Central Processing Unit) 연산 량만 필요로 하여 셋톱박스 전력소모 저감에 적합하다. 본 논문의 제어방안은 기존의 사업자 측면에서 대기상태 셋톱박스의 업데이트 편의성을 유지시키면서도 국가적 차원의 전력소모 저감에 기여를 할 것이다.

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Trend of Intel Nonvolatile Memory Technology (인텔 비휘발성 메모리 기술 동향)

  • Lee, Y.S.;Woo, Y.J.;Jung, S.I.
    • Electronics and Telecommunications Trends
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    • v.35 no.3
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    • pp.55-65
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    • 2020
  • With the development of nonvolatile memory technology, Intel has released the Optane datacenter persistent memory module (DCPMM) that can be deployed in the dual in-line memory module. The results of research and experiments on Optane DCPMMs are significantly different from the anticipated results in previous studies through emulation. The DCPMM can be used in two different modes, namely, memory mode (similar to volatile DRAM: Dynamic Random Access Memory) and app direct mode (similar to file storage). It has buffers in 256-byte granularity; this is four times the CPU (Central Processing Unit) cache line (i.e., 64 bytes). However, these properties are not easy to use correctly, and the incorrect use of these properties may result in performance degradation. Optane has the same characteristics of DRAM and storage devices. To take advantage of the performance characteristics of this device, operating systems and applications require new approaches. However, this change in computing environments will require a significant number of researches in the future.

An Effective Pre-refresh Mechanism for Embedded Web Browser of Mobile Handheld Devices

  • Li Huaqiang;Kim Young-Hak;Kim Tae-Hyung
    • Journal of Korea Multimedia Society
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    • v.7 no.12
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    • pp.1754-1764
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    • 2004
  • Lately mobile handheld devices such as Personal Digital Assistant (PDA) and cellular phones are getting more popular for personal web surfing. However, today most mobile handheld devices have relatively poor web browsing capability due to their low performance so their users have to suffer longer communication latency than those of desktop Personal Computers (PCs). In this paper, we propose an effective pre-refresh mechanism for embedded web browser of mobile handheld devices to reduce this problem. The proposed mechanism uses the idle time to pre-refresh the expired web objects in an embedded web browser's cache memory. It increases the utilization of Central Processing Unit (CPU) power and network bandwidth during the idle time and consequently reduces the client's latency and web browsing cost. An experiment was done using a simulator designed by us to evaluate the efficacy of the proposed mechanism. The experiment result demonstrates that it has a good performance to make web surfing faster.

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Embedded System for Automatic Condensation Control of the Car

  • Lee, Dmitriy;Bae, Yong-Wook;Lee, Neung-Ho;Seo, Hee-Don
    • Journal of Sensor Science and Technology
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    • v.21 no.1
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    • pp.21-27
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    • 2012
  • In this study, we designed an embedded system for automatic condensation control(ESCC) of the car. This system heats the car glasses as and when it is needed that makes driving safer and convenient. The system was built on an ATmega128L central processing unit(CPU), using high-performance electrically erasable programmable read-only memory(EEPROM) complex programmable logic device(CPLD) ATF1504AS, using which an ESCC algorithm has been proposed. The source code was written in C language. The algorithm of work was written using the dew-point table. This system not only clears the condensation on the glass but also averts condensation. The designed ESCC system begins working once the input information comes close to the dew-point table information. This device enables a wider field of view, thereby increasing safety.