• Journal of the Semiconductor & Display Technology
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• v.20 no.3
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• pp.57-64
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• 2021

The domestic semiconductor industry can produce various products that will satisfy customer needs by diversifying assembly parts and increasing compatibility between them. It is necessary to improve the production line as a method to reduce the work-in-process inventory (WIP) in the assembly line, the idle time of the worker, and the idle time of the process. The improvement of the production line is to balance the capabilities of each process as a whole, and to determine the timing of product input or the order of the work process so that the time required between each process is balanced. The purpose of this study is to find the optimal WIP and buffer size through SA (Simulated Annealing) that minimizes lead time while matching the number of two parts in a parallel assembly line with bottleneck process. The WIP level and buffer size obtained by the SA algorithm were applied to the CONWIP and DBR systems, which are the existing production systems, and the simulation was performed by applying them to the new hybrid production system. Here, the Hybrid method is a combination of CONWIP and DBR methods, and it is a production system created by setting new rules. As a result of the Simulation, the result values were derived based on three criteria: lead time, production volume, and work-in-process inventory. Finally, the effect of the hybrid production method was verified through comparative analysis of the result values.

• Journal of the Korean Operations Research and Management Science Society
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• v.18 no.3
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• pp.1-12
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• 1993

Several alternative manufacturing control strategies are under study in the literature. They are, specifically, push system, pull system, conwip system, and as a special case, infinite buffer system. We focus on modeling, comparison analysis and design of these systems. The event epoch sequences of each system are generated which also enable us to compare their performance. Then the stochastic monotonicity of these enent epoch sequences in several important design parameters are established through the structure of the generalized semi-Markov schemes on which they are based. Finally, we solve the stochastic optimization problem which minimizes these event epochs. Our results supplement the applicability of some previously known results in the literature.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.40 no.1
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• pp.79-86
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• 2017

This research focused on deciding optimal manufacturing WIP (Work-In-Process) limit for a small production system. Reducing WIP leads to stable capacity, better manufacturing flow and decrease inventory. WIP is the one of the important issue, since it can affect manufacturing area, like productivity and line efficiency and bottlenecks in manufacturing process. Several approaches implemented in this research. First, two strategies applied to decide WIP limit. One is roulette wheel selection and the other one is elite strategy. Second, for each strategy, JIT (Just In Time), CONWIP (Constant WIP), Gated Max WIP System and CWIPL (Critical WIP Loops) system applied to find a best material flow mechanism. Therefore, pull control system is preferred to control production line efficiently. In the production line, the WIP limit has been decided based on mathematical models or expert's decision. However, due to the complexity of the process or increase of the variables, it is difficult to obtain optimal WIP limit. To obtain an optimal WIP limit, GA applied in each material control system. When evaluating the performance of the result, fitness function is used by reflecting WIP parameter. Elite strategy showed better performance than roulette wheel selection when evaluating fitness value. Elite strategy reach to the optimal WIP limit faster than roulette wheel selection and generation time is short. For this reason, this study proposes a fast and reliable method for determining the WIP level by applying genetic algorithm to pull system based production process. This research showed that this method could be applied to a more complex production system.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.39 no.1
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• pp.73-80
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• 2016

This study focuses on the formation of input release lots in a semiconductor wafer fabrication facility. After the order-lot pegging process assigns lots in the fab to orders and calculates the required quantity of wafers for each product type to meet customers' orders, the decisions on the formation of input release lots should be made to minimize the production costs of the release lots. Since the number of lots being processed in the wafer fab directly is related to the productivity of the wafer fab, the input lot formation is crucial process to reduce the production costs as well as to improve the efficiency of the wafer fab. Here, the input lot formation occurs before every shift begins in the semiconductor wafer fab. When input quantities (of wafers) for product types are given from results of the order-lot pegging process, lots to be released into the wafer fab should be formed satisfying the lot size requirements. Here, the production cost of a homogeneous lot of the same type of product is less than that of a heterogeneous lot that will be split into the number of lots according to their product types after passing the branch point during the wafer fabrication process. Also, more production cost occurs if a lot becomes more heterogeneous. We developed a multi-dimensional dynamic programming algorithm for the input lot formation problem and showed how to apply the algorithm to solve the problem optimally with an example problem instance. It is necessary to reduce the number of states at each stage in the DP algorithm for practical use. Also, we can apply the proposed DP algorithm together with lot release rules such as CONWIP and UNIFORM.