• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.1
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• pp.24-28
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• 2012

In this study, we fabricated an amorphous InGaZnO pseudo-MOS transistor (a-IGZO ${\Psi}$-MOSFET) with a stacked $Si_3N_4/SiO_2$ (NO) gate dielectric and evaluated reliability of the devices with various thicknesses of a $SiO_2$ buffer layer. The roles of a $SiO_2$ buffer layer are improving the interface states and preventing degradation caused by the injection of photo-created holes because of a small valance band offset of amorphous IGZO and $Si_3N_4$. Meanwhile, excellent electrical properties were obtained for a device with 10-nm-thick $SiO_2$ buffer layer of a NO stacked dielectric. The threshold voltage shift of a device, however, was drastically increased because of its thin $SiO_2$ buffer layer which highlighted bias and light-induced hole trapping into the $Si_3N_4$ layer. As a results, the pseudo-MOS transistor with a 20-nm-thick $SiO_2$ buffer layer exhibited improved electrical characteristics and device reliability; field effective mobility(${\mu}_{FE}$) of 12.3 $cm^2/V{\cdot}s$, subthreshold slope (SS) of 148 mV/dec, trap density ($N_t$) of $4.52{\times}1011\;cm^{-2}$, negative bias illumination stress (NBIS) ${\Delta}V_{th}$ of 1.23 V, and negative bias temperature illumination stress (NBTIS) ${\Delta}V_{th}$ of 2.06 V.

• Korean Journal of Materials Research
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• v.11 no.7
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• pp.575-579
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• 2001

GaN buffer layer and epilayer have been grown on sapphire (0001) by metal organic chemical vapor deposition (MOCVD). GaN buffer layer ranging from 26 nm to 130 nm in thickness was grown at 55$0^{\circ}C$ prior to the 4 $\mu\textrm{m}$ thick GaN epitaxial deposition at 110$0^{\circ}C$. After GaN buffer layer growth, buffer layer surface was examined by atomic force microscopy (AFM). As the thickness of GaN buffer layer was increased, surface morphology of GaN epilayer was investigated by scanning electron microscopy (SEM). Double crystal X-ray diffraction (DCXRD) and Raman spectroscopy were employed to study crystallinity of GaN epilayers. Optical properties of GaN epilayers were measured by photoluminescence (PL). The epilayer grown with a thin buffer layer had rough surface, and the epilayer grown with a thick buffer layer had mirror-like surface of epilayer. Although the stress on the latter was larger than on the former, its crystallinity was much better. These results imply that the internal free energy is decreased in case of the thick buffer layer. Decrease in internal free energy promotes the lateral growth of the GaN film, which results in the smoother surface and better crystallinity.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.574-577
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• 2001

GaN thin films on sapphire were grown by rf magnetron sputtering with ZnO buffer layer. The dependence of GaN film quality on ZnO buffer layer was investigated by X-ray diffraction(XRD). The improved film quality has been obtained by using thin ZnO buffer layer. Using Auger electron spectroscopy(AES), it was observed that the annealing process improved the GaN film quality. The surface roughness according to the annealing temperatures(700, 900, 1100$^{\circ}C$) were investigated by AFM(atomic force microscopy) and it was confirmed that the crystallization was improved by increasing the annealing temperature. Photoluminescence at 8K shows a near-band-edge peak at 3.2eV with no deep level emission.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.5
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• pp.380-386
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• 1991

Hydrogen plasma-assisted epitaxial(PAE) growth of GaAs/Si and GaAs/Ge/Si with Ge buffer layer has been investigated. By means of photoluminescence, Nomarski microscopu, and $\alpha$-step, it could be known that GaAs on Si with Ge buffer layer has better crystalline quality than GaAs on Si without Ge buffer layer. The stoichiometry of GaAs layer on Si was confirmed by the depth profile of Auger electron spectroscope (AES). Also the native oxide(SiO$_2$) layer on Si substrate was plama-etched and the removal of the oxide layer was confirmed by AES. Photoluminescence peak wavelength of GaAs/Ge/Si with Ge buffer of 1\ulcorner thickness and GaAs growth rate of 160$\AA$/min was 8700$\AA$and FWHM was 12$\AA$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.2
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• pp.228-235
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• 2004

In this thesis, it is designed efficient electrode formation on the organic luminescent device. ITO electrode is treated with $O_2$plasma. In order to inject hole efficiently, there is proposed the shape of anode that inserted plasma polymerized films as buffer layer between anode and organic layer using thiophene monomer. It is realized efficiently electron injection to aluminum due to introduce the quantum well in cathode. In the case of device inserted the buffer layer by using the plasma poiymerization after $O_2$plasma processing for ITO transparent electrode, since it forms the stable interface and reduce the moving speed of hole, the recombination of hole and electronic ate made in the omitting layer. Compared with the devices without buffer layer, the turn-on voltage was lowered by 1.0(V) doc to the introduction of buffer layer Since the quantum well structure is formed in front of cathode to optimize the tunneling effect, there is improved the power efficiency more than two times.

• New & Renewable Energy
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• v.17 no.4
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• pp.36-45
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• 2021

To remove the Cu secondary phase remaining on the surface of a CIGSSe absorber layer manufactured by the two-step process, KCN etching was applied before depositing the CdS buffer layer. In addition, it was possible to increase the conversion efficiency by air annealing after forming the CdS buffer layer. In this study, various pre-treatment/post-treatment conditions wereapplied to the S-containing CIGSSe absorber layerbefore and after formation of the CdS buffer layer to experimentally confirm whether similareffects as those of Se-terminated CIGSe were exhibited. Contrary to expectations, it was noted that CdS air annealing had negative effects.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.203.1-203.1
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• 2013

Zinc oxide (ZnO) nanocrystalline thin films on various growth temperatures for active layer and different buffer layer thickness were grown by plasma-assisted molecular beam epitaxy (PA-MBE) on Si substrates. The ZnO active layer were grown with various growth temperature from 500 to $800^{\circ}C$ and the ZnO buffer layer were grown for different time from 5 to 40 minutes. To investigate the structural and optical properties of the ZnO thin films, scanning electron microscope (SEM), X-ray diffractometer (XRD), and photoluminescence (PL) spectroscopy were used, respectively. In the SEM images, the ZnO thin films have high densification of grains and good roughness and uniformity at $800^{\circ}C$ for active layer growth temperature and 20 minutes for buffer layer growth time, respectively. The PL spectra of ZnO buffer layers and active layers display sharp near band edge (NBE) emissions in UV range and broad deep level emissions (DLE) in visible range. The intensity of NBE peaks for the ZnO thin films significantly increase with increase in the active layer growth temperature. In addition, the NBE peak at 20 minutes for buffer layer growth time has the largest emission intensity and the intensity of DLE peaks decrease with increase in the growth time.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.12
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• pp.38-43
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• 1994

GaAs and AlGaAs layers were grown by Molecular Beam Epitaxy (MBE) to fabricate hith performance GaAs MESFETs. Optimum growth temperatures were found to be 600$^{\circ}C$ from their Hall measurement data. MESFETs with the gate legth of 1${\mu}$m and the gate width of 100.mu.m were fabricated on the MBE-grown GaAs layters which has i-GaAs buffer layer and characterized. Knee volgate and mazimum transconductance of the devices were 1V, 224mS/mm, respectively. Cut-off frequency at on-wafer measuring pattern was measured to be 18 GHz. The MESFET with the 1${\mu}$m -thick i-Al$_{0.3}Ga_{0.7}$As buffer layer between nactive and i-GaAs was fabricated on order to reduce the leakage current which flows through the i-GaAs buffer layer. Its output resistance was 2.26 k${\Omega}$.mm which increased by a factor of 15 compared with the MESFET without i-Al$_{0.3}Ga_{0.7}$As buffer layer.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2015.11a
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• pp.306-307
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• 2015

유기태양전지의 대표적 Hole Transporting Layer(HTL)로는 전도성 고분자인 PEDOT:PSS이다. PEDOT:PSS는 약산성의 물질로 전극을 부식시켜 디바이스의 효율을 감소시키기 때문에 PEDOT:PSS를 대체하기 위한 Buffer층에 대한 연구가 활발히 진행되어지고 있다. PEDOT:PSS를 대체할 수 있는 Nickel Oxide(NiO) Buffer 층은 wide band-gab으로 Hole Transporting Layer와 Electron Blocking Layer 역할을 동시에 하여 디바이스의 효율을 향상시킬 수 있으며, 디바이스의 수명을 향상시킬 수 있다는 장점이 있다. NiO는 용액공정과 Sputter 증착 방법으로 형성할 수 있는데, 용액공정은 고온공정이 요구되어지고 Sputter 증착방법은 산화되기 쉬운 전극위에서는 전극의 손상을 발생한다. 본 연구에서는 이러한 단점을 해결하기 위해서 Ni을 Magnetron Sputter로 증착한 후 Ion Beam 처리를 통해 산화시켜 NiO 층을 형성하는 방법을 연구하였다. 본 연구에서 제안한 NiO형성 방법으로 유기태양전지를 제작하여 PEDOT:PSS를 Buffer층으로 사용한 태양전지와 Voc가 0.72 V로 유사하게 나와 NiO가 Buffer층으로 잘 형성된 것을 확인하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.11a
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• pp.360-363
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• 2003

In this paper, we investigated SiNx film as a buffer layer of TFT-FRAM. Buffer layers were prepared by two step process of a $N_2$ plasma treatment and subsequent $SiN_x$ deposition. By employing $N_2$ plasma treatment, interface traps such as mobile charges and injected charges were removed, hysteresis of current-voltage curve disappeared. After $N_2$ plasma treatment, a leakage current was decreased about 2 orders. From these results, it is possible to perform the plasma treating process to make a good quality buffer layer of MFIS-FET or capacitor as an application of non-volatile memory.