• 제어로봇시스템학회논문지
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• 제21권10호
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• pp.910-916
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• 2015

A sensorless motor control scheme with conventional back-Electro Motive Force (EMF) sensing based on zero crossing point (ZCP) detection has been widely used in various applications. However, there are several problems with the conventional method for effectively driving sensorless brushless motors. For example, a phase mismatch of 30 degrees occurs between the ZCP and commutation time. Additionally, most of the motor speed/current controls are achieved based on a pulse width modulation (PWM) method, which generates significant noise that distracts the back-EMF sensing. Due to the PWM switching, the ZCP is not deterministic, and thus the efficiency of the motor is reduced because the phase transition points become uncertain. Moreover, the motor driving performance is degraded at a low speed range due to the effect of PWM noise. To solve these problems, an improved back-EMF detection method based on a differential line method is proposed in this paper. In addition, the proposed sensorless BLDC driver addresses the problems by using a variable voltage driver generated from a buck converter. The variable voltage driver does not generate the PWM switching noise. Consequently, the proposed sensorless motor driver improves 1) the signal-to-noise ratio of back-EMF, 2) the operation range of a BLDC motor, and 3) the torque characteristics. The proposed sensorless motor driver is verified through simulations and experiments.

• 한국항공우주학회지
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• 제42권6호
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• pp.522-528
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• 2014

일반적으로 큐브위성에 적용되는 통신방식은 모노폴과 다이폴 안테나를 이용한 전이중통신으로 UHF/VHF 두 대역을 이용하여 송 수신을 하는 방식이 적용되고 있으나, 장착공간의 제약을 받는 큐브위성에 적용할 경우, 안테나 구속 및 전개방식의 복잡화를 비롯해 안테나 장착만을 목적으로 하는 별도의 전용 판넬을 필요로 하는 등 탑재체 또는 태양전지탑재를 위한 공간 효율적 측면에서의 단점을 갖는다. 본 논문에서는 큐브위성의 태양전지장착 공간 활용 극대화를 목적으로 상용 반이중 통신방식 UHF대역 송 수신 겸용 안테나를 선정하여 큐브위성의 통신 시스템 설계를 수행하였으며, 안테나의 사양 및 위성 운용조건으로부터 상향링크 및 하향링크에 대한 링크버짓 분석을 통해 상기 통신방식의 유효성을 입증하였다. 또한, 통신 시스템의 주요 구성 요소인 안테나 전개를 위해 본 큐브위성에 적용된 안테나 분리방식에 대해 소개하였다.

• Journal of Power Electronics
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• 제16권1호
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• pp.227-237
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• 2016

A novel digital current control strategy for digitally controlled DC-DC switching converters, referred to as Adjacent Cycle Sampling (ACS), is proposed in this paper. For the ACS current control strategy, the available time interval from sampling the current to updating the duty ratio, is approximately one switching cycle. In addition, it is independent of the duty ratio. As a result, the contradiction between the processing speed of the hardware and the transient response speed can be effectively relaxed by using the ACS current control strategy. For digitally controlled buck DC-DC switching converters with trailing-edge modulation, digital current control algorithms with the ACS control strategy are derived for three different control objectives. These objectives are the valley, average, and peak inductor currents. In addition, the sub-harmonic oscillations of the above current control algorithms are analyzed and eliminated by using the digital slope compensation (DSC) method. Experimental results based on a FPGA are given, which verify the theoretical analysis results very well. It can be concluded that the ACS control has a faster transient response speed than the time delay control, and that its requirements for hardware processing speed can be reduced when compared with the deadbeat control. Therefore, it promises to be one of the key technologies for high-frequency DC-DC switching converters.