• 제목/요약/키워드: Bottom dielectric isolation

검색결과 3건 처리시간 0.017초

Radiation effects on multi-channel Forksheet-FET and Nanosheet-FET considering the bottom dielectric isolation scheme

  • Gunhee Choi;Jongwook Jeon
    • Nuclear Engineering and Technology
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    • 제56권11호
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    • pp.4679-4687
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    • 2024
  • This study analyzes the single-event transient (SET) characteristics of alpha particles on multi-channel Forksheet-FET and Nanosheet-FET at the device and circuit levels through 3D TCAD simulations. The study investigates the differences in SET responses based on the energy and incident position of incoming alpha particles, considering the structural variances between Forksheet-FET and Nanosheet-FET, as well as the presence or absence of bottom dielectric isolation (BDI) in the fabrication process. Specifically, the introduction of BDI is observed to significantly suppress the voltage drop caused by 'unintended' current, as it can block the substantial electron-hole pairs (EHP) generated by injected alpha particles in the bulk substrate from reaching the FET terminals. Furthermore, it was confirmed that the size of abnormal current decreases as the energy of the injected alpha particle increases. Additionally, evaluating the response to SET based on the fundamental logic circuit, the CMOS inverter, revealed relatively small abnormal voltage drops for both Forksheet and Nanosheet when BDI was applied, confirming high immunity to radiation effects. Moreover, it can be observed that the application of BDI enhances reliability from a memory perspective by effectively suppressing voltage flips in the SRAM's cross-coupled latch circuit.

Effect of a Multi-Step Gap-Filling Process to Improve Adhesion between Low-K Films and Metal Patterns

  • Lee, Woojin;Kim, Tae Hyung;Choa, Yong-Ho
    • 한국재료학회지
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    • 제26권8호
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    • pp.427-429
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    • 2016
  • A multi-step deposition process for the gap-filling of submicrometer trenches using dimethyldimethoxysilane (DMDMOS), $(CH_3)_2Si(OCH_3)_2$, and $C_xH_yO_z$ by plasma enhanced chemical vapor deposition (PECVD) is presented. The multi-step process consisted of pre-treatment, deposition, and post-treatment in each deposition step. We obtained low-k films with superior gap-filling properties on the trench patterns without voids or delamination. The newly developed technique for the gap-filling of submicrometer features will have a great impact on inter metal dielectric (IMD) and shallow trench isolation (STI) processes for the next generation of microelectronic devices. Moreover, this bottom up gap-fill mode is expected to be universally for other chemical vapor deposition systems.

개구 결합 급전 구조를 갖는 이중 선형편파 패치 안테나의 설계 및 제작 (Design and Fabrication of Dual Linear Polarization Patch Antenna with Aperture Coupled Feeding Structure)

  • 윤중한
    • 한국전자통신학회논문지
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    • 제18권6호
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    • pp.1015-1022
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    • 2023
  • 본 논문에서는 4.7 GHz 특화망 대역에 적용할 수 있는 개구결합 급전을 갖는 이중 선형편파 안테나를 제안하였다. 제안된 안테나는 격리도 향상을 위해 일반적인 개구 결합급전을 갖고 상층과 하층에 각각 급전점을 갖도록 설계하였다. 각각의 기판의 크기는 34.0 mm×34.0 mm (W×L)이며 두께(h) 1.0 mm, 그리고 비유전율이 4.4인 FR-4 기판을 사용하였다. 또한 상층의 윗면에 12.7 mm×14.6 mm (W2×L3)의 패치를, 하층의 아랫면에 24.0mm×1.6 mm의 급전선로를, 접지면에 1.0 mm×7.7 mm(S×T)의 크기를 갖는 슬롯을 설계하여 패치로 급전되도록 하였다. 제작 및 측정 결과로부터, -10 dB 반사손실을 기준으로 배열 안테나의 경우, 입력포트 1에서 300.0 MHz (4.52~4.82 GHz), 입력포트 2에서 170.0 MHz (4.65~4.82 GHz)의 대역폭을 얻었으며 전달계수 S21은 -30 dB 이하의 값을 얻었다. 또한 각 급전포트에서의 편파분리도를 얻었다.