• Journal of Electrical Engineering and Technology
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• v.8 no.4
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• pp.752-759
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• 2013

This paper proposes a method for fault diagnosis and fault-tolerant control of DC-link voltage sensor for two-stage three-phase grid-connected PV inverters. Generally, the front-end DC-DC boost converter tracks the maximum power point (MPP) of PV array and the rear-end DC-AC inverter is used to generate a sinusoidal output current and keep the DC-link voltage constant. In this system, a sensor is essential for power conversion. A sensor fault is detected when there is an error between the sensed and estimated values, which are obtained from a DC-link voltage sensorless algorithm. Fault-tolerant control is achieved by using the estimated values. A deadbeat current controller is used to meet the dynamic characteristic of the proposed algorithm. The proposed algorithm is validated by simulation and experiment results.

• Journal of Information Processing Systems
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• v.17 no.1
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• pp.178-190
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• 2021

Alzheimer's disease (AD) is an insidious and degenerative neurological disease. It is a new topic for AD patients to use magnetic resonance imaging (MRI) and computer technology and is gradually explored at present. Preprocessing and correlation analysis on MRI data are firstly made in this paper. Then kernel principal component analysis (KPCA) is used to extract features of brain gray matter images. Finally supervised classification schemes such as AdaBoost algorithm and support vector machine algorithm are used to classify the above features. Experimental results by means of AD program Alzheimer's Disease Neuroimaging Initiative (ADNI) database which contains brain structural MRI (sMRI) of 116 AD patients, 116 patients with mild cognitive impairment, and 117 normal controls show that the proposed method can effectively assist the diagnosis and analysis of AD. Compared with principal component analysis (PCA) method, all classification results on KPCA are improved by 2%-6% among which the best result can reach 84%. It indicates that KPCA algorithm for feature extraction is more abundant and complete than PCA.

• Journal of information and communication convergence engineering
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• v.8 no.5
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• pp.575-580
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• 2010

Eye gaze as a form of input was primarily developed for users who are unable to use usual interaction devices such as keyboard and the mouse; however, with the increasing accuracy in eye gaze detection with decreasing cost of development, it tends to be a practical interaction method for able-bodied users in soon future as well. This paper explores a low-cost, robust, rotation and illumination independent eye gaze system for gaze enhanced user interfaces. We introduce two brand-new algorithms for fast and sub-pixel precise pupil center detection and 2D Eye Gaze estimation by means of deformable template matching methodology. In this paper, we propose a new algorithm based on the deformable angular integral search algorithm based on minimum intensity value to localize eyeball (iris outer boundary) in gray scale eye region images. Basically, it finds the center of the pupil in order to use it in our second proposed algorithm which is about 2D eye gaze tracking. First, we detect the eye regions by means of Intel OpenCV AdaBoost Haar cascade classifiers and assign the approximate size of eyeball depending on the eye region size. Secondly, using DAISMI (Deformable Angular Integral Search by Minimum Intensity) algorithm, pupil center is detected. Then, by using the percentage of black pixels over eyeball circle area, we convert the image into binary (Black and white color) for being used in the next part: DTBGE (Deformable Template based 2D Gaze Estimation) algorithm. Finally, using DTBGE algorithm, initial pupil center coordinates are assigned and DTBGE creates new pupil center coordinates and estimates the final gaze directions and eyeball size. We have performed extensive experiments and achieved very encouraging results. Finally, we discuss the effectiveness of the proposed method through several experimental results.

• Journal of KIISE
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• v.43 no.10
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• pp.1131-1143
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• 2016

How can we effectively compress big graphs composed of billions of edges? By concentrating non-zeros in the adjacency matrix through vertex rearrangement, we can compress big graphs more efficiently. Also, we can boost the performance of several graph mining algorithms such as PageRank. SlashBurn is a state-of-the-art vertex rearrangement method. It processes real-world graphs effectively by utilizing the power-law characteristic of the real-world networks. However, the original SlashBurn algorithm displays a noticeable slowdown for large-scale graphs, and cannot be used at all when graphs are too large to fit in a single machine since it is designed to run on a single machine. In this paper, we propose a distributed SlashBurn algorithm to overcome these limitations. Distributed SlashBurn processes big graphs much faster than the original SlashBurn algorithm does. In addition, it scales up well by performing the large-scale vertex rearrangement process in a distributed fashion. In our experiments using real-world big graphs, the proposed distributed SlashBurn algorithm was found to run more than 45 times faster than the single machine counterpart, and process graphs that are 16 times bigger compared to the original method.

• Transactions of the Korean Society of Automotive Engineers
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• v.21 no.6
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• pp.135-146
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• 2013

This paper presents a feedforward control algorithm for the EGR and VGT systems of passenger car diesel engines. The air-to-fuel ratio and boost pressure are selected as control indicators and the positions of EGR valve and VGT vane are used as control inputs of the EGR and VGT controller. In order to compensate the non-linearity and coupled dynamics of the EGR and VGT systems, we have proposed a non-linear model-based feedforward control algorithm which is obtained from static model inversion approach. It is observed that the average modeling errors of the feedforward algorithm is about 2% using stationary engine experiment data of 225 operating conditions. Using a feedback controller including proportional-integral, the modeling error is compensated. Furthermore, it is validated that the proposed feedforward algorithm generates physically acceptable trajectories of the actuator and successfully tracks the desired values through engine experiments.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.6
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• pp.110-116
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• 2014

Pattern matching algorithms are widely used in computer security systems such as computer networks, ubiquitous networks, sensor networks, and so on. However, the advances in information technology causes grow on the amount of data and increase on the computation complexity of pattern matching processes. Therefore, there is a strong demand for a novel high performance pattern matching algorithms. In light of this fact, this paper newly proposes a suffix tree based pattern matching algorithm. The suffix tree is constructed based on the suffix values of all patterns. Then, the shift nodes which informs how many characters can be skipped without matching operations are added to the suffix tree in order to boost matching performance. The proposed algorithm reduces memory usage on the suffix tree and the amount of matching operations by the shift nodes. From the performance evaluation, our algorithm achieved 24% performance gain compared with the traditional algorithm named as Wu-Manber.

• Smart Media Journal
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• v.5 no.1
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• pp.15-23
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• 2016

This paper proposes an effective algorithm of Korean license plate recognition. By applying Haar-like feature and Canny edge detection on a captured vehicle image, it is possible to find a connected rectangular, which is a strong candidate for license plate. The color information of license plate separates plates into white and green. Then, OTSU binary image processing and foreground neighbor pixel propagation algorithm CLNF will be applied to each license plates to reduce noise except numbers and letters. Finally, through labeling, numbers and letters will be extracted from the license plate. Letter and number regions, separated from the plate, pass through mesh method and thinning process for extracting feature vectors by X-Y projection method. The extracted feature vectors are classified using neural networks trained by backpropagation algorithm to execute final recognition process. The experiment results show that the proposed license plate recognition algorithm works effectively.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.6
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• pp.57-65
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• 2007

This paper presents the design of single phase PFC(Power Factor Correction) using a DSP(TMS320F2812). In order to realize the proposed boost PFC converter in average current mode control, the DSP requires the A/D sampling values for a line input voltage, a inductor current, and the output voltage of the converter. Because of a FET switching noise, these sampling values contain a high frequency noise and switching ripple. The solution of A/D sampling keeps away from the switching point. Because the PWM duty is changed from 5% to 95%, we can#t decide a fixed sampling time. In this paper, the three A/D converters of the DSP are started using the prediction algorithm for the FET ON/OFF time at every sampling cycle(40 KHz). Implemented A/D sampling algorithm with only one timer of the DSP is very simple and gives the autostart of these A/D converters. From the experimental result, it was shown that the power factor was about 0.99 at wide input voltage, and the output ripple voltage was smaller than 5 Vpp at 80 Vdc output. Finally the parameters and gains of PI controllers are controlled by serial communication with Windows Xp based PC. Also it was shown that the implemented PFC converter can achieve the feasibility and the usefulness.

• Journal of the Korea Society of Computer and Information
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• v.27 no.11
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• pp.147-155
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• 2022

In this study, we developed a system to dynamically balance a daily stock portfolio and performed trading simulations using gradient boosting and genetic algorithms. We collected various stock market data from stocks listed on the KOSPI and KOSDAQ markets, including investor-specific transaction data. Subsequently, we indexed the data as a preprocessing step, and used feature engineering to modify and generate variables for training. First, we experimentally compared the performance of three popular gradient boosting algorithms in terms of accuracy, precision, recall, and F1-score, including XGBoost, LightGBM, and CatBoost. Based on the results, in a second experiment, we used a LightGBM model trained on the collected data along with genetic algorithms to predict and select stocks with a high daily probability of profit. We also conducted simulations of trading during the period of the testing data to analyze the performance of the proposed approach compared with the KOSPI and KOSDAQ indices in terms of the CAGR (Compound Annual Growth Rate), MDD (Maximum Draw Down), Sharpe ratio, and volatility. The results showed that the proposed strategies outperformed those employed by the Korean stock market in terms of all performance metrics. Moreover, our proposed LightGBM model with a genetic algorithm exhibited competitive performance in predicting stock price movements.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.2
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• pp.150-161
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• 2012

Eye detection is widely used in applications, such as face recognition, driver behavior analysis, and human-computer interaction. However, it is difficult to achieve real-time performance with software-based eye detection in an embedded environment. In this paper, we propose a parallel hardware architecture for real-time eye detection. We use the AdaBoost algorithm with modified census transform(MCT) to detect eyes on a face image. We parallelize part of the algorithm to speed up processing. Several downscaled pyramid images of the eye candidate region are generated in parallel using the input face image. We can detect the left and the right eye simultaneously using these downscaled images. The sequential data processing bottleneck caused by repetitive operation is removed by employing a pipelined parallel architecture. The proposed architecture is designed using Verilog HDL and implemented on a Virtex-5 FPGA for prototyping and evaluation. The proposed system can detect eyes within 0.15 ms in a VGA image.