• Journal of Internet of Things and Convergence
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• v.8 no.6
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• pp.93-97
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• 2022

The purpose of this study is to suggest implications for early childhood SW·AI education considering the characteristics of early childhood education through a survey on SW·AI education in kindergartens. For this study, data were collected from 194 kindergartens through convenience sampling. The data was analyzed using frequency distribution, and it was found that 44% of kindergartens are conducting SW·AI education. 22% are conducting SW·AI education in the form of regular curriculum, and 70% are conducting SW·AI education in the form of special activities after school. SW·AI education was found to be conducted mainly by external instructors (97%) in the classroom (80%). For SW·AI education, block coding-based programs developed by companies such as Naver and the Clova were used, and all of these programs used programs and teaching aids in a package format, including teaching aids and materials developed by companies. 56% answered that they are not currently conducting SW/AI education, and lack of awareness on SW·AI education and lack of human/environmental infrastructure were the main factors. In order to realize SW·AI education considering the characteristics of early childhood education based on this survey, First, SW·AI education programs should be developed to develop play-centered computational thinking skills. Second, systematic teacher education at the national level should be conducted. Finally, the establishment of a department dedicated to early childhood SW·AI consisting of early childhood education experts and SW·AI education experts and financial support at the national level should be provided.

• The Journal of the Korea Contents Association
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• v.7 no.12
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• pp.262-272
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• 2007

SAD (Sum of Absolute Difference) algorithm is the most frequently executing routine in motion estimation, which is the most demanding process in motion picture encoding. To enhance the performance of motion picture encoding on a VLIW processor, an optimal implementation of SAD algorithm on VLIW processor should be accomplished. In this paper, we propose an implementation of optimal scheduling of SAD algorithm with conditional branch on a VLIW-based high performance DSP. We first transform the nested loop with conditional branch of SAD algorithm into a single loop with conditional branch which has a large enough loop body to utilize fully the ILP capability of VLIW DSP and has a conditional branch to make the escape from loop to be achieved as soon as possible. And then we apply a modulo scheduling technique to the transformed single loop. We test the proposed implementation on TMS320C6713, and analyze the code size and performance with respect to processing time. Through experiments, it is shown that the SAD implementation proposed in this paper has small code size appropriate for embedded applications, and the H.263 encoder with the proposed SAD implementation performs better than other H.263 encoder with other SAD implementations.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.2C
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• pp.181-188
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• 2007

This paper proposed a watermark embedding/extracting method using CABAC(Context-based Adaptive Binary Arithmetic Coding) which is the entropy encoder for the main profile of MPEG-4 Part 10 H.264/AVC. This algorithm selects the blocks and the coefficients in a block on the bases of the contexts extracted from the relationship to the adjacent blocks and coefficients. A watermark bit is embedded without any modification of coefficient or with replacing the LSB(Least Significant Bit) of the coefficient with a watermark bit by considering both the absolute value of the selected coefficient and the watermark bit. Therefore, it makes it hard for an attacker to find out the watermarked locations. By selecting a few coefficients near the DC coefficient according to the contexts, this algorithm satisfies the robustness requirement. From the results from experiments with various kinds and various strengths of attacks the maximum error ratio of the extracted watermark was 5.02% in maximum, which makes certain that the proposed algorithm has very high level of robustness. Because it embeds the watermark during the context modeling and binarization process of CABAC, the additional amount of calculation for locating and selecting the coefficients to embed watermark is very small. Consequently, it is highly expected that it is very useful in the application area that the video must be compressed right after acquisition.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.37 no.5
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• pp.54-63
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• 2000

We present a multi-resolution block matching algorithm (BMA) for fast motion estimation At the coarsest level, a motion vector (MV) having minimum matching error is chosen via a full search, and a MV with minimum matching error is concurrently found among the MVs of the spatially adjacent blocks Here, to examine the spatial MVs accurately, we propose an efficient method for searching full resolution MV s without MV quantization even at the coarsest level The chosen two MV s are used as the initial search centers at the middle level At the middle level, the local search is performed within much smaller search area around each search center If the method used at the coarsest level is adopted here, the local searches can be done at integer-pel accuracy A MV having minimum matching error is selected within the local search areas, and then the final level search is performed around this initial search center Since the local searches are performed at integer-pel accuracy at the middle level, the local search at the finest level does not take an effect on the overall performance So we can skip the final level search without performance degradation, thereby the search speed increases Simulation results show that in comparison with full search BMA, the proposed BMA without the final level search achieves a speed-up factor over 200 with minor PSNR degradation of 02dB at most, under a normal MPEG2 coding environment Furthermore, our scheme IS also suitable for hardware implementation due to regular data-flow.