• Journal of the Korea Society of Computer and Information
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• v.22 no.5
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• pp.1-9
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• 2017

Recently, flash memory has been in a great demand from embedded system sectors for storage devices. However, program/erase (P/E) cycles per block are limited on flash memory. For the limited number of P/E cycles, many wear leveling techniques are studied. They prolonged the life time of flash memory using information tables. As one of the techniques, block erase table (BET) method using a bit array table was studied for embedded devices. However, it has a disadvantage in that performance of wear leveling is sharply low, when the consumption of memory is reduced. To solve this problem, we propose a novel wear leveling technique using Sampling-based Block Erase Table (SBET). SBET relates one bit of the bit array table to each block by using exclusive OR operation with round robin function. Accordingly, SBET enhances accuracy of cold block information and can prevent to decrease the performance of wear leveling. In our experiment, SBET prolongs life time of flash memory by up to 88%, compared with previous techniques which use a bit array table.

• Journal of the Society of Naval Architects of Korea
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• v.41 no.5
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• pp.55-62
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• 2004

The logistics of entire shipbuilding process are integrated during the block erection process and the schedules for the erection process are made prior to. the schedules of any other processes. Therefore, efficient scheduling of the block erection process are one of most important issues in shipbuilding. There are only a few studies published regarding block erection scheduling methods because of its complexity and variability. This paper proposes an algorithm for diminution of maximum load based on constraint satisfaction technique. it is developed primarily for the efficiency in load leveling and applicability to the actual block erection process. The proposed algorithm is applied to actual block erection process and the results shows improvements in load leveling. It can also be used for the scheduling of fabrication, sub-assembly, and assembly to improve load leveling.

• Journal of the Korean Society of Marine Environment & Safety
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• v.21 no.2
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• pp.207-214
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• 2015

In this paper the independence axiom, one of two principal axioms of axiomatic design theory, is applied to the leveling system development as an design criteria. After functional requirements and corresponding design parameters constitute an initial design matrix for the leveling system, sequence, which is compatible with the independence axiom, of the design parameters of the design matrix is determined and independent components of block leveling system are revealed. As a result of axiomatic design, system configuration related to the design sequence is developed. In order to verify and validate the developed block leveling system, test with real hull block leveling work in site by using total station which is used to acquire three dimensional coordinate of target point is performed. Comparison with measured data and output data from the block leveling system shows the system accuracy is under 1 mm so that the developed system is verified and validated to be used in site.

• Journal of the Korea Society of Computer and Information
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• v.20 no.11
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• pp.1-8
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• 2015

Flash memory has advantages in that it is fast access speed, low-power, and low-price. Therefore, they are widely used in electronics industry sectors. However, the flash memory has weak points, which are the limited number of erase operations and non-in-place update problem. To overcome the limited number of erase operations, many wear leveling techniques are studied. They use many tables storing information such as erase count of blocks, hot and cold block indicators, reference count of pages, and so on. These tables occupy some space of main memory for the wear leveling techniques. Accordingly, they are not appropriate for low-power devices limited main memory. In order to resolve it, a wear leveling technique using bit array and Bit Set Threshold (BST) for flash memory. The proposing technique reduces the used space of main memory using a bit array table, which saves the history of block erase operations. To enhance accuracy of cold block information, we use BST, which is calculated by using the number of invalid pages of the blocks in a one-to-many mode, where one bit is related to many blocks. The performance results illustrate that the proposed wear leveling technique improve life time of flash memory to about 6%, compared with previous wear leveling techniques using a bit array table in our experiment.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.175-178
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• 2008

While read operation on flash memory is fast and doesn't have any constraints, flash memory can not be overwritten on updating data, new data are updated in new area. If data are frequently updated, garbage collection, which is achieved by erasing blocks, should be performed to reclaim new area. Hence, because the number of erase operations is limited due to characteristics of flash memory, every block should be evenly written and erased. However, if data with access locality are processed by cost benefit algorithm with separation of hot block and cold block, though the performance of processing is high, wear-leveling is not even. In this paper, we propose CB-MG (Cost Benefit between Multi Group) algorithm in which hot data are allocated in one group and cold data in another group, and in which role of hot group and cold group is exchanged every period. Experimental results show that performance and wear-leveling of CB-MG provide better results than those of CB-S.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.1
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• pp.108-114
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• 2008

Since flash memory cannot be overwritten, new data are updated in new area. If data are frequently updated, garbage collection which is achieved by erasing blocks, should be performed to reclaim new area. Hence, because the count of erase operations is limited due to characteristics of flash memory, every block should be evenly written and erased. However, if data with access locality are processed by cost benefit algorithm with separation of hot block ad cold block though the performance of processing is hight wear-leveling is not even. In this paper, we propose CB-MB (Cost Benefit between Multi Bank) algorithm in which hot data are allocated in one bank and cold data in another bank, and in which role of hot bank and cold bank is exchanged every period. CB-MB shows that its performance is 30% better than cost benefit algorithm with separation of cold block and hot block its wear-leveling is about a third of that in standard deviation.

• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.3
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• pp.149-157
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• 2017

In this paper, we propose BCMR (Block Classification with Monitor and Restriction) to ensure the isolation and to reduce the interference of blocks between a garbage collection and a wear leveling. The proposed BCMR monitors an endurance variation of blocks during the garbage collection and detects hot blocks by making a restriction condition based on this information. The proposal induces a block classification by its update frequency for the garbage collection and the wear leveling, so we will get a prolonged lifetime of NAND flash memory systems. In a performance evaluation, BCMR prolonged the lifetime of NAND flash memory systems by 3.95%, on average and reduced a standard deviation per block by 7.4%, on average.

• IE interfaces
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• v.7 no.2
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• pp.75-85
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• 1994

This paper presents a production scheduling model in a block assembly shop in shipbuilding industry. In a block assembly shop, the most important performance criterion is load leveling, which balances manpower and work area utilization through the planning horizon. The problem is formulated as a mixed-integer nonlinear programming(MINLP) problem of which objective function is to optimize load leveling. The developed MINLP problem can not be solvable due to computational complexity. The MINLP problem is decomposed into two stage mixed-integer linear programming (MILP) problems to obtain a good solution, but the decomposed MILP problems are still computationally intractable because of combinatorial complexity. Therfore, a heuristic method using linear programming is proposed to solve two stage MILP problems sequentially. The proposed heuristic generates a good production schedule within a reasonable computation time, and it is easily applicable for establishing the production schedule in a block assembly shop in shipbuilding industry.

• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.3
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• pp.121-130
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• 2017

NAND flash memory has advantages of non-volatility, little power consumption and fast access time. However, it suffers from inability that does not provide to update-in-place and the erase cycle is limited. Moreover, the unit of read/write operation is a page and the unit of erase operation is a block. Therefore, erase operation is slower than other operations. The AGC, the proposed garbage collection policy focuses on not only garbage collection time reduction for real-time guarantee but also wear-leveling for a flash memory lifetime. In order to achieve above goals, we define three garbage collection operating modes: Fast Mode, Smart Mode, and Wear-leveling Mode. The proposed policy decides the garbage collection mode depending on system CPU usage rate. Fast Mode selects the dirtiest block as victim block to minimize the erase operation time. However, Smart Mode selects the victim block by reflecting the invalid page number and block erase count to minimizing the erase operation time and deviation of block erase count. Wear-leveling Mode operates similar to Smart Mode and it makes groups and relocates the pages which has the similar update time. We implemented the proposed policy and measured the performance compare with the existing policies. Simulation results show that the proposed policy performs better than Cost-benefit policy with the 55% reduction in the operation time. Also, it performs better than Greedy policy with the 87% reduction in the deviation of erase count. Most of all, the proposed policy works adaptively according to the CPU usage rate, and guarantees the real-time performance of the system.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.574-577
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• 2007

While disk can be overwritten on updating data, because flash memory can not be overwritten on updating data, new data are updated in new area. If data are frequently updated, garbage collection, which is achieved by erasing blocks, should be performed to reclaim new area. Hence, because the number of erase operations is limited due to characteristics of flash memory, every block should be evenly written and erased. However, if data with access locality are processed by cost benefit algorithm with separation of hot block and cold block, though the performance of processing is high, wear-leveling is not even. In this paper, we propose CB-MB (Cost Benefit between Multi Bank) algorithm in which hot data are allocated in one bank and cold data in another bank, and in which role of hot bank and cold bank is exchanged every period. CB-MB showed that its performance was similar to that of others for uniform workload, however, the method provides much better performance than that of others for workload of access locality.