• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.285-288
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• 2005

In this paper, we propose a two step Binary Exponential search algorithm for rapid acquisition time of UWB(Ultra Wide Band) signal on UWB communication systems. Previous proposed timing acquisition algorithm is searching whole frame that consist of the number of n Bins to terminate search, however this paper proposed two step Binary Exponential search algorithm can achieve remarkable reduction of UWB signal acquisition time as limiting search group. Proposed search algorithm is consisting of search group establishment step and Bit Reversing of search group establishment step.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.2B
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• pp.71-79
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• 2006

Address lookup is an essential function in the Internet routers, and it determines overall router performance. In this paper, we have thoroughly investigated the binary-search-based address lookup algorithms and proposed a new algorithm based on binary search on prefix lengths. Most of the existing binary search schemes perform binary search on prefix values, and hence the lookup speed is proportional to the length of prefixes or the log function of the number of prefixes. The previous algorithm based on binary search on prefix lengths has superior lookup performance than others. However, the algorithm requires very complicated pre-computation of markers and best matching prefixes in internal nodes since naive binary search is not possible in their scheme. This complicated pre-computation makes the composition of the routing table and incremental update very difficult. By using leaf-pushing, the proposed algorithm in this paper removes the complicated pre-computation of the Previous work in performing the binary search on prefix lengths. The performance evaluation results show that the proposed scheme has very good performance in lookup speed compared with previous works.

• Journal of KIISE:Information Networking
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• v.36 no.1
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• pp.57-67
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• 2009

Packet forwarding in the Internet routers is to find out the longest prefix that matches the destination address of an input packet and to forward the input packet to the output port designated by the longest matched prefix. The IP address lookup is the key of the packet forwarding, and it is required to have efficient data structures and search algorithms to provide the high-speed lookup performance. In this paper, an efficient IP address lookup algorithm using binary search is investigated. Most of the existing binary search algorithms are not efficient in search performance since they do not provide a balanced search. The proposed binary search algorithm performs perfectly balanced binary search using switch pointers. The performance of the proposed algorithm is evaluated using actual backbone routing data and it is shown that the proposed algorithm provides very good search performance without increasing the memory amount storing the forwarding table. The proposed algorithm also provides very good scalability since it can be easily extended for multi-way search and for large forwarding tables

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.12B
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• pp.1103-1111
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• 2008

Internet routers forward an incoming packet to an output port toward its final destination through IP address lookup. Since each incoming packet should be forwarded in wire-speed, it is essential to provide the high-speed search performance. In this paper, IP address lookup algorithms using binary search are studied. Most of the binary search algorithms do not provide a balanced search, and hence the required number of memory access is excessive so that the search performance is poor. On the other hand, binary-search-on-range algorithm provides high-speed search performance, but it requires a large amount of memory. This paper shows an optimized binary-search-on-range structure which reduces the memory requirement by deleting unnecessary entries and an entry field. By this optimization, it is shown that the binary-search-on-range can be performed in a routing table with a similar or lesser number of entries than the number of prefixes. Using real backbone routing data, the optimized structure is compared with the original binary-search-on-range algorithm in terms of search performance. The performance comparison with various binary search algorithms is also provided.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.5B
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• pp.285-295
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• 2008

Internet routers perform packet forwarding which determines a next hop for each incoming packet using the packet's destination IP address. IP address lookup becomes one of the major challenges because it should be performed in wire-speed for every incoming packet under the circumstance of the advancement in link technologies and the growth of the number of the Internet users. Many binary search algorithms have been proposed for fast IP address lookup. However, tree-based binary search algorithms are usually unbalanced, and they do not provide very good search performance. Even for binary search algorithms providing balanced search, they have drawbacks requiring prefix duplication. In this paper, a new binary search algorithm which provides the balanced binary search and the number of its entries is much less than the number of original prefixes. This is possible because of composing the binary search tree only with disjoint prefixes of the prefix set. Each node has a prefix vector that has the prefix nesting information. The number of memory accesses of the proposed algorithm becomes much less than that of prior binary search algorithms, and hence its performance for IP address lookup is considerably improved.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.857-862
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• 2004

This paper analyzes properties of the recently developed nonlinear optimization method, Dynamic Encoding Algorithm for Searches (DEAS) [1]. DEAS locates local minima with binary strings (or binary matrices for multi-dimensional problems) by iterating the two operators; bisectional search (BSS) and unidirectional search (UDS). BSS increases binary strings by one digit (i.e., zero or one), while UDS performs increment or decrement to binary strings with no change of string length. Owing to these search routines, DEAS retains the optimization capability that combines the special features of several conventional optimization methods. In this paper, a special feature of BSS and UDS in DEAS is analyzed. In addition, a effective global search strategy is established by using information of DEAS. Effectiveness of the proposed global search strategy is validated through the well-known benchmark functions.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.2
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• pp.152-156
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• 2013

This paper presents a fast-lock dual-loop successive approximation register-controlled duty-cycle corrector (SARDCC) circuit using a mixed (binary+sequential) search algorithm. A wider duty-cycle correction range, higher operating frequency, and higher duty-cycle correction accuracy have been achieved by utilizing the dual-loop architecture and the binary search SAR that achieves the fast duty-cycle correcting property. By transforming the binary search SAR into a sequential search counter after the first DCC lock-in, the proposed dual-loop SARDCC keeps the closed-loop characteristic and tracks variations in process, voltage, and temperature (PVT). The measured duty cycle error is less than ${\pm}0.86%$ for a wide input duty-cycle range of 15-85 % over a wide frequency range of 0.5-2.0 GHz. The proposed dual-loop SARDCC is fabricated in a 0.18-${\mu}m$, 1.8-V CMOS process and occupies an active area of $0.075mm^2$.

• ETRI Journal
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• v.32 no.4
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• pp.638-641
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• 2010

With the growth of memory capacity and density, memory testing and repair with the goal of yield improvement have become more important. Therefore, the development of high efficiency redundancy analysis algorithms is essential to improve yield rate. In this letter, we propose an improved built-in redundancy analysis (BIRA) algorithm with a minimized binary search tree made by simple calculations. The tree is constructed until finding a solution from the most probable branch. This greatly reduces the search spaces for a solution. The proposed BIRA algorithm results in 100% repair efficiency and fast redundancy analysis.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.5 s.335
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• pp.47-54
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• 2005

This paper proposes and analyzes a Tag Anti-collision algorithm in RFID system. We mathematically compare the performance of the proposed algorithm with existing binary algorithms(binary search algorithm, slotted binary tree algorithm using time slot, and bit-by-bit binary tree algorithm proposed by Auto-ID center). We also validated analytic results using OPNET simulation. Based on analytic result, comparing the proposed Improved bit-by-bit binary tree algerian with bit-by-bit binary tree algorithm which is the best of existing algorithms, the performance of Improved bit-by-bit binary tree algorithm is about $304\%$ higher when the number of tags is 20, and $839\%$ higher when the number of tags is 200.

• Journal of the Korean Physical Society
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• v.73 no.12
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• pp.1845-1848
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• 2018

We introduce a process for optically reconstructing full-color holographic images recorded by optical scanning holography. A complex RGB-color hologram was recorded and converted into a binary hologram using a direct binary search (DBS) algorithm. The generated binary hologram was then optically reconstructed using a spatial light modulator. The discrepancies between the reconstructed object sizes and colors due to chromatic aberration were corrected by adjusting the reconstruction parameters in the DBS algorithm. To the best of our knowledge, this represents the first optical reconstruction of a full-color hologram recorded by optical scanning holography.