• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2010.06a
• /
• pp.368-368
• /
• 2010

Using TFTs crystallized by MICC and ELA, electron mobility and threshold voltage were measured according to various substrate temperature from $-40^{\circ}C$ to $100^{\circ}C$. Basic curve, $V_G-I_D$, is also measured under various stress time from 1s to 10000s. Consequently, due to the passivation effect and number of grains, mobility of MICC is varied in the range of -8% ~ 7.6%, while that of ELA is varied from -11.04% ~ 13.25%. Also, since $V_G-I_D$ curve is dominantly affected by grain size, active layer interface, the graph remained steady under the various gate bias stress time from 1s to 10000s. This proves the point that MICC can be alternative technic to ELA.

• Transactions on Electrical and Electronic Materials
• /
• v.18 no.1
• /
• pp.51-54
• /
• 2017

TFTs (thin film transistors) were fabricated using a-SIZO (amorphous silicon-indium-zinc-oxide) channel by RF (radio frequency) magnetron sputtering at room temperature. We report the influence of various channel thickness on the electrical performances of a-SIZO TFTs and their stability, using TS (temperature stress) and NBTS (negative bias temperature stress). Channel thickness was controlled by changing the deposition time. As the channel thickness increased, the threshold voltage ($V_{TH}$) of a-SIZO changed to the negative direction, from 1.3 to -2.4 V. This is mainly due to the increase of carrier concentration. During TS and NBTS, the threshold voltage shift (${\Delta}V_{TH}$) increased steadily, with increasing channel thickness. These results can be explained by the total trap density ($N_T$) increase due to the increase of bulk trap density ($N_{Bulk}$) in a-SIZO channel layer.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.08a
• /
• pp.340-341
• /
• 2012

In this work, we investigated the effects of temperature stress on flatband voltage (VFB) shifts of HfO2-SiO2 double gate dielectrics devices. Fig. 1 shows a high frequency C-V of the device when a positive bias for 10 min and a subsequent negative bias for 10 min were applied at room temperature (300 K). Fig. 2 shows the corresponding plot when the same positive and negative biases were applied at a higher temperature (473.15 K). These measurements are based on the BTS (bias temperature stress) about mobile charge in the gate oxides. These results indicate that the positive bias stress makes no difference, whereas the negative bias stress produces a significant difference; that is, the VFB value increased from ${\Delta}0.51$ V (300 K, Fig. 1) to ${\Delta}14.45$ V (473.15 K, Fig. 2). To explain these differences, we propose a mechanism on the basis of oxygen vacancy in HfO2. It is well-known that the oxygen vacancy in the p-type MOS-Cap is located within 1 eV below the bottom of the HfO2 conduction band (Fig. 3). In addition, this oxygen vacancy can easily trap the electron. When heated at 473.15 K, the electron is excited to a higher energy level from the original level (Fig. 4). As a result, the electron has sufficient energy to readily cross over the oxide barrier. The probability of trap about oxygen vacancy becomes very higher at 473.15 K, and therefore the VFB shift value becomes considerably larger.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.16 no.3
• /
• pp.181-185
• /
• 2003

Influence of post gate oxidation anneal on Negative Bias Temperature Instability (NBTI) of PMOSFE has been investigated. At oxidation anneal temperature raised above 950$^{\circ}$C, a significant improvement of NBTI was observed which enables to reduce PMO V$\_$th/ shift occurred during a Bias Temperature (BT) stress. The high temperature anneal appears to suppress charge generations inside the gate oxide and near the silicon oxide interface during the BT stress. By measuring band-to-band tunneling currents and subthreshold slopes, reduction of oxide trapped charges and interface states at the high temperature oxidation anneal was confirmed.

• Journal of Information Display
• /
• v.13 no.1
• /
• pp.51-54
• /
• 2012

In this study, the bias-temperature stress and current-temperature stress induced by the electrical stabilities of half-Corbino hydrogenated-amorphous-silicon (a-Si:H) thin-film transistors (TFTs) with different gate electrode geometries fabricated on the same substrate were examined. The influence of the gate pattern on the threshold voltage shift of the half-Corbino a-Si:H TFTs is discussed in this paper. The results indicate that the half-Corbino a-Si:H TFT with a patterned gate electrode has enhanced power efficiency and improved aperture ratio when compared with the half-Corbino a-Si:H TFT with an unpatterned gate electrode and the same source/drain electrode geometry.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2009.10a
• /
• pp.1568-1570
• /
• 2009

Nanocrystalline silicon thin films were deposited using an internal-type inductively coupled plasma-chemical vapor deposition at room temperature by varying the bias power to the substrate and the structural characteristics of the deposited thin film were investigated. The result showed that the crystalline volume fraction was decreased with the increase of bias power. At the low bias power range of 0~60 W, the compress stress in the deposited thin film was in the range of -34 ~ -77 Mpa which is generally lower than the residual stress observed for the nanocrystalline silicon thin films deposited by capacitively coupled plasma.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2016.02a
• /
• pp.302.1-302.1
• /
• 2016

Solution-processed amorphous metal-oxide thin-film transistors (TFTs) are considered as promising candidates for the upcoming transparent and flexible electronics due to their transparent property, good performance uniformity and possibility to fabricate at a low-temperature. In addition, solution processing metal oxide TFTs may allow non-vacuum fabrication of flexible electronic which can be more utilizable for easy and low-cost fabrication. Recently, for high-mobility oxide TFTs, multi-layered oxide channel devices have been introduced such as superlattice channel structure and heterojunction structure. However, only a few studies have been mentioned on the bias illumination stress in the multi- layered oxide TFTs. Therefore, in this research, we investigated the effects of bias illumination stress in solution-processed bilayer oxide TFTs which are fabricated by the deep ultraviolet photochemical activation process. For studying the electrical and stability characteristics, we implemented positive bias stress (PBS) and negative bias illumination stress (NBIS). Also, we studied the electrical properties such as field-effect mobility, threshold voltage ($V_T$) and subthreshold slop (SS) to understand effects of the bilayer channel structure.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2011.02a
• /
• pp.252-253
• /
• 2011

ZnO-based thin film transistors (TFTs) are of great interest for application in next generation flat panel displays. Most research has been based on amorphous indium-gallium-zinc-oxide (IGZO) TFTs, rather than single binary oxides, such as ZnO, due to the reproducibility, uniformity, and surface smoothness of the IGZO active channel layer. However, recently, intrinsic ZnO-TFTs have been investigated, and TFT- arrayss have been demonstrated as prototypes of flat-panel displays and electronic circuits. However, ZnO thin films have some significant problems for application as an active channel layer of TFTs; it was easy to change the electrical properties of the i-ZnO thin films under external conditions. The variable electrical properties lead to unstable TFTs device characteristics under bias stress and/or temperature. In order to obtain higher performance and more stable ZnO-based TFTs, HZO thin film was used as an active channel layer. It was expected that HZO-TFTs would have more stable electrical characteristics under gate bias stress conditions because the binding energy of Hf-O is greater than that of Zn-O. For deposition of HZO thin films, Hf would be substituted with Zn, and then Hf could be suppressed to generate oxygen vacancies. In this study, the fabrication of the oxide-based TFTs with HZO active channel layer was reported with excellent stability. Application of HZO thin films as an active channel layer improved the TFT device performance and bias stability, as compared to i-ZnO TFTs. The excellent negative bias temperature stress (NBTS) stability of the device was analyzed using the HZO and i-ZnO TFTs transfer curves acquired at a high temperature (473 K).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2000.07a
• /
• pp.324-327
• /
• 2000

In this paper, the effects of negative and positive bias stress on p-channel poly-Si TFT's fabricated by excimer laser annealing have been investigated After positive and negative bias stress, transcon-ductance(g$_{m}$) is increased because of a reduction of the effective channel length due to the injected electron in the gate oxide. In the positive bias stress, the injection of hole is appeared after stress time of 3600sec and g$_{m}$ is decreased. On the other hand, the gate voltage at the maximum g$_{m}$, S-swing and threshold voltage(V$_{th}$) are decreased because of the interface state generation due to the injection of electrons into the gate oxide.e.ide.e.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.08a
• /
• pp.298-298
• /
• 2012

본 연구에서는 Bias Temperature Stress (BTS) 측정을 통한 다층세라믹커패시터(Multi-Layer Ceramic Capacitor, MLCC) 소자 분석에 대한 연구를 진행하였다. BTS 분석은 소자 내부에 존재하는 Na+, K+ 등의 mobile charge 검출을 위한 방법으로 positive bias와 negative bias stress에 따른 C-V 특성 곡선으로부터 mobile charge의 정량적 해석이 가능하다. 실험 결과 positive bias stress 후의 C-V 특성 곡선이 stress 전 C-V 특성 곡선과 비교해 negative bias 영역으로 0.0376 V 만큼 shift 하였다. 또한 수식(QM = $Cox{\cdot}{\triangle}V$)으로부터 $1.7{\times}1,011$개의 mobile charge가 존재함을 확인하였다. 본 연구는 MLCC 소자 내의 금속 오염물 존재 여부에 따른 소자의 전기적 특성 변화 분석을 위해 진행되었으며, BTS 분석은 반도체 소자 뿐 아니라 본 연구에서와 같이 커패시터 소자의 결함 여부 판단에도 이용 가능함을 확인하였다.