• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.36-42
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• 2008

40Gb/s CMOS Clock and Data Recovery circuit design for optical serial link is proposed. The circuit generates 8 multiphase clock using LC tank PLL and controls the phase between the clock and the data using the $2{\times}$ oversampling Bang-Bang PD. 40Gb/s input data is 1:4 demultiplexed and recovered to 4 channel 10Gb/s outputs. The design was progressed to separate the analog power and the digital power. The area of the chip is $2.8{\times}2.4mm^2$ for the inductors and the power dissipation is about 200mW. The chip has been fabricated using 0.18um CMOS process. The measured results show that the chip recovers the data up to 9.5Gb/s per channel(Equivalent to serial input rate of up to 38Gb/s).

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.32 no.4
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• pp.34-42
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• 2004

In this paper, a double gimbal is used for roll/yaw attitude control of spacecraft and two feedback controllers are designed. One is a PD controller of no phase difference between roll and yaw control input. The other is a PD controller with a phase lag compensator about the yaw control input. The phase lag compensator is designed a first order system and a lag parameter is designed for the control of yaw angle. There are two case simulations for each of controllers; constant disturbance torques and initial errors of nutation. We obtain the results through simulations that a steady-state error and a rising time of yaw angle are developed by the compensator. In this paper, simulation parameters use the values of KOREASAT 1.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.9 s.339
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• pp.1-10
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• 2005

In this paper, we proposed predistortion algerian that can compensate temperature distortion by digital. Predistortion algorithm produces compensation value of distortion by temperature as well as system nonlinear distortion by input level, and warps beforehand signal of baseband. To prove excellency of such algorithm we applied predistortion algorithm to Saleh's high power amplifier model, and did computer simulation. As a result, P1dB increased about 0.5 dBm phase shift reduced about $0.8^{o}$ than existent the A&P PD, and predistiortion algorithm to apply temperature compensation techniques improved P1dB about 2dBm and stabilized phase shift by about $0.1^{o}$ low. When approved UMTS's sample signal to this amplifier, IMD3 of amplifier decreased 10dBm than is no temperature compensation techniques, and reduced 19dBm than signal that is no distortion.