• Journal of Korean Society of Transportation
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• v.24 no.5 s.91
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• pp.123-133
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• 2006

Seoul and many large cities in Korea have implemented Median Exclusive Bus Lane(MEB). But exclusive bus lane in the middle of the road caused new contradictions between left turn movement and through bus movement and several signal operation techniques like 'left turn Protected' and 'overlap phase' couldn't be applied in intersections on MEB. We suggest 'Bus-only Signal for median lane technique as solution of these problems This study presents optimum signal time design process and detailed algorithms for intersections where bus-only signals are installed. As a test field. we took Yang-Je intersection where Median Exclusive Bus Lane go through. and have large gap in volume of left turn in main direction. And we verified that revised optimum signal time including overlap phase can reduce average delay time of vehicle through before and after simulation.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.4
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• pp.286-292
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• 2004

In this paper we present a static performance estimation technique of on-chip bus architectures. The proposed technique requires the static scheduling of function blocks of a task to analyze bus conflicts caused by simultaneous accesses from processing elements to which function blocks are mapped. To apply it to multitask applications, the concurrent execution of the function blocks of different tasks also should be considered. Since tasks are scheduled independently, considering all cases of concurrency in each processing element is impractical. Therefore we make an average estimate on the effects of other tasks with respect to bus request rate and bus access time. The proposed technique was incorporated with our exploration framework for on-chip bus architectures, Its viability and efficiency are validated by a preliminary example.

• Proceedings of the KSR Conference
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• 2011.10a
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• pp.2782-2786
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• 2011

In this paper a protocol design for bus network communication between onboard signalling system and MMI(Man Machine Interface) will be presented and illustrated. Recently, many onboard signailling systems adopt hot standby for safety reasons. Hot standby is a method of redundancy in which the primary and secondary systems run simultaneously. It is convenient to use bus network(bus topology) in a hot standby system for communication between onboard signalling system and MMI. Because bus network is the simplest way to connect multiple clients such as onboard signalling system, MMI and etc. However, there are many problems when two clients want to transmit at the same time on the same bus. A effective protocol is necessary to solve that problems. We will describes protocol design which is useful when onboard signalling systems and MMIs are connected via RS485(Bus Network).

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.2
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• pp.117-126
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• 2012

This paper provides a method for compression transmission of on-chip bus data. As the data traffic on on-chip buses is rapidly increasing with enlarged video resolutions, many video processor chips suffer from a lack of bus bandwidth and their IP cores have to wait for a longer time to get a bus grant. In multimedia data such as images and video, the adjacent data signals very often have little or no difference between them. Taking advantage of this point, this paper develops a simple bus data compression method to improve the chip performance and presents its hardware implementation. The method is applied to a Video Codec - 1 (VC-1) decoder chip and reduces the processing time of one macro-block by 13.6% and 10.3% for SD and HD videos, respectively

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1081-1084
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• 1998

In this paper, we propose the bus coding technique for low power consumption. For CMOS circuit most power is dissipated as dynamic power for charging and discharging node capacitances.Though the I/O and bus are likely to have the very large capacitances associated with them and dissipate much of the power dissipated by an IC, they have little beenthe special target for power reduction. The conventional Bus-Invert coding method can't decrease the peak power dissipation by 50% because the additional invert signal line can invoke a transition at the time when Bus-Invert coding isn't used to code original bus data. The proposed technique always constraints the Hamming distance between data transferred sequentially to be below the half of the bus width, and thus decrease the I/O peak power dissipation and the I/O average power dissipation.

• International Journal of Automotive Technology
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• v.6 no.4
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• pp.403-411
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• 2005

The bus is regarded as one of the most frequently used public transportation systems, the research and development on driving stability, safety, and convenience for drivers and passengers has tremendously increased in recent days. This paper investigated the design of the bus door mechanism composed of an actuator (or motor) and linkages. The bus door mechanism is divided into many types according to the coupling of the linkages and the driving system. The mathematical models of all types of door mechanism have been constructed for computer simulation. To design the bus door mechanism, we developed a simulation program, which automates the kinematic and dynamic analysis according to the input parameters of each linkage and the driving system. Using this program, we investigated the design parameters that affect the kinematic and dynamic characteristics of the bus door mechanism under various simulation conditions. In addition, simple examples are examined to validate the developed program.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.662_663
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• 2009

Motor bus transfer involves the process of transferring a bus that has several critical motors to an alternate source of power when the main normal power source feeding them is interrupted. Bus transfer is a time-critical application in which the transfer progress depends on various parameters such as the type of motor, load on the motor at the time of transfer, inertia of the motor, and the combined open-circuit time constant of various motors present on the bus at the time of transfer. This paper present the result of modeling and simulation of nuclear power motor bus using ETAP(Electrical Transient Analyzing Program) program for motor and motor bus residual voltage decay characteristics.

• Proceedings of the KIEE Conference
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• 2000.07a
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• pp.49-51
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• 2000

ln this paper, a method by which penalty factors of all generators including slack bus can be directly derived is presented. With a simple re-assignment of angle reference bus to a bus where no generation exists, penalty factors for slack bus is obtained without any physical assumption. While previous Jacobian-based techniques for generator penalty factor calculation have been derived with basis upon reference bus, proposed method are not dependent on reference bus and calculated penalty factors can be substituted directly into the general ELD equation to compute the economic dispatch. Equations for system loss sensitivity, penalty factors and optimal generation allocation are solved simultaneously in normal power flow computation.

• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.66-67
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• 2014

Stabilization of the DC bus voltage is an important task in DC-AC microgrid system with renewable energy source such as solar system. A battery energy storage system (BESS) has become a general solution to stabilize the DC-bus voltage in DC-AC microgrid. This paper develops the analog BESS controller which requires neither computation nor dc-bus voltage measurement, so that the system can be implemented simply and easily. Even though others methods can stabilize and control the DC-bus voltage, it has complicated structure in control and low adaptive capability. The proposed topology is simple but is able to compensate the solar source variation and stabilize the DC-bus voltage under any loads and distributed generation (DG) conditions. In addition, the design of analog controller is presented to obtain a robust system. In order to verify the effectiveness of the proposed control strategy, simulation is carried out by using PSIM software.

• International Journal of Control, Automation, and Systems
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• v.3 no.spc2
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• pp.376-385
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• 2005

The proliferation of technology has made global conduction of business increasingly dependent upon the availability of reliable power. As a result, alternate power systems are being installed and expanded to protect the broadening scope of critical electrical loads. Bus transfer restores designated critical loads to an alternate source when utility derived service becomes inadequate or goes out of service due to any contingency. This paper describes the practices, requirements and implementation of bus transfer of motor loads to an alternate source of power. A new high-speed automatic bus transfer scheme is proposed which includes the development of a new algorithm for determining the type of bus transfer required and the realization of the scheme by using modem protection devices and intra-substation communication facilities.