• Journal of KIISE:Software and Applications
• /
• v.36 no.11
• /
• pp.875-890
• /
• 2009

Metabolimics interprets an organism as a network of functional units and an organism is represented by a metabolic pathway i.e., well-displayed graph. So a software tool for drawing pathway is necessary to understand it comprehensively. These tools have a problem that edge-crossings exponentially increase as the number of nodes grows. To apply automatic graph layout techniques to the genome-scale metabolic flow, it is very important to reduce unnecessary edge-crossing on a metabolic pathway layout. In this paper, we design and implement 2.5D metabolic pathway layout modules. Metabolic pathways are represented hierarchically by making use of the '2-layered layout algorithm' in 3D. It enhances the readability and reduces unnecessary edge-crossings by using 3D layout modules instead of 2D layout algorithms.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.18 no.2
• /
• pp.450-455
• /
• 2017

A shield connector is an automotive electrical component that is used to connect electrical wiring in a vehicle. This part is made by progressive pressing using a phosphor bronze material with high electrical conductivity. The shape of the product is not complicated, but plastic forming techniques are required, such as deep drawing and bending, as well as shearing techniques such as piercing and notching. The finite element method was used to model the process. The strip layout design stage of the progressive die makes it possible to examine the thickness change, the stability of the forming process, and the spring-back. As a result of this analysis, it is possible to predict the correction values for the tendency of cracks, wrinkles, and incomplete plastic deformation, and to identify possible problems in advance. As a countermeasure against the forming error caused by the drawing process analysis, the drawing shape was modified and applied in the process design. For effective material utilization, a 3D strip layout was designed using an optimized blank shape based on nesting. The results improve the crack stability and spring-back of shield connector products produced through progressive pressing.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2003.06a
• /
• pp.1-4
• /
• 2003

Knowledge classification and expression of constructed knowledge have been main research issues in the field of knowledge representation. Constructed design knowledge of the former product loses its utility when new products with different structures are introduced to the market. In order to construct the design knowledge for a new product. designers need to reconstruct the design knowledge with new relationships. The design knowledge has been constructed with level trees, but it is difficult to rearrange the relations. Design DNA is proposed in this work in order to facilitate the rearrangement of design knowledge and give flexibility to knowledge structure. Design DNA is based on Layout-oriented domain knowledge and Function-oriented domain knowledge, which enables to generate new design knowledge that will result in new part geometries for given constraints on the part functions. Design DNA is applied to the design knowledge of lever system of the automatic transmission of passenger cars as an example.

• Journal of the Korea Society for Simulation
• /
• v.27 no.2
• /
• pp.125-137
• /
• 2018

Simulations have been used to evaluate the efficiency of logistics or manufacturing systems and predict the outcomes of the systems. New simulation models are needed to evaluate new alternative plants and layouts during the resource design process. Although it is easy to handle minor changes in parameters by modifying a simulation model, it takes considerable time and effort for simulation modelers to alter the layout, which involves changes in many simulation sub-models. Therefore, this study proposes a method to transfer information in AutoCAD layout to the simulation model automatically. This study also defines a standard document as an Excel Form, and suggests a method to transfer information on the basic layouts, processes, resources, and workers to a simulation model automatically. A simulation tool, called Tecnomatix Plant Simulation 9.0, was used for this study. The proposed approach in this study was applied to a semiconductor wafer factory for a case study.

• The KIPS Transactions:PartD
• /
• v.10D no.1
• /
• pp.101-108
• /
• 2003

Construction of automated terminal it urgently demanded to gain the foundation of hub-port in north east Asia. Therefore we suggest an adequate operating system layout of automated terminal in Korea. In this paper the aim of automated terminal operating system is satisfied. four basic models are divided according to moving course of export and import cargo of each automated equipments, several input data are changed and analyzed dynamically by Trial and Error method, and then an optimized operating system model is selected, and designed for yard operating system layout on the basis of the selected model. Particularly, the productivity of automated port is up to the kind of automated equipments. However, because expense and present work process must be considered actually. In order to prevent confusion of the work, the method to optimize the present work and substitute prevent equipments and automated equipments was designed. It is a premise that ail the yard equipments described in this paper must be automatic except quay crane.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.60 no.2
• /
• pp.451-454
• /
• 2011

In this paper, a wideband clock generator using novel Automatic frequency calibration(AFC) scheme is proposed. Wideband clock generator using AFC has the advantage of small VCO gain and wide frequency band. The conventional AFC compares whether the feedback frequency is faster or slower then the reference frequency. However, the proposed AFC can detect frequency difference between reference frequency with feedback frequency. So it can be reduced an operation time than conventional methods AFC. Conventional AFC goes to the initial code if the frequency step changed. This AFC, on the other hand, can a prior state code so it can approach a fast operation. In simulation results, the proposed clock generator is designed for DisplayPort using the CMOS ring-VCO. The VCO tuning range is 350MHz, and a VCO frequency is 270MHz. The lock time of clock generator is less then 3us at input reference frequency, 67.5MHz. The phase noise is -109dBC/Hz at 1MHz offset from the center frequency. and power consumption is 10.1mW at 1.8V supply and layout area is $0.384mm^2$.

• Transactions of the Korean Society for Noise and Vibration Engineering
• /
• v.25 no.7
• /
• pp.487-495
• /
• 2015

A generalized special program called planetary transmission analysis(here in after PTA) is developed to improve planetary gear noise in automatic transmission. PTA is capable of analyzing any typical one-degree-of-freedom automatic transmission gear train containing any number of simple, compound or complex-compound planetary gear sets. The kinematics module in PTA can compute the rotational speeds of gears and carriers and calculate the order frequencies to predict the planetary noise components. The power flow analysis module performs a complete static force analysis providing forces, moments, or torques of gears, bearings, clutches and connections. Based on the given type and number of planetary gear sets, the search algorithm determines all possible kinematic configurations and gear tooth combinations in a required set of gear ratios, while eliminating whole kinematic redundancies and unfavorable clutching sequences. By using PTA program, planetary internal speeds of new developed automatic transmission are early obtained; therefore, possibility of the noise problem could be predicted in early design stage. As implementing PTA in planetary gear NVH development procedure, planetary gear noise was successfully reduced by 10 dBA.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.16 no.12
• /
• pp.1313-1323
• /
• 1991

n this thesis CAM(content Addressable Memory) generator and graphic display tool for run-plot sequence in automatic generation of CAM are presented. We show that implementing the layout generation, graphic menu, mouse driver, and data structure by using the basic classes is clear and easy in modification than the conventional procedural language. For the implementation of generator which is independent of design rule or process, we use the parameterized cell so that basic cell can be changed according to user's inputs. and perform the layout by means of placement and routing using pitch mathching. Finally, the display of CIF which generated and constitution of graphic menu for total run-plot sequence are explained.

• The Transactions of the Korea Information Processing Society
• /
• v.4 no.10
• /
• pp.2434-2444
• /
• 1997

As software industry progresses, the necessity of visual information have increased more than text-oriented information. So, automatic tools are required to satisfy a user's desire for visual design representation of various source information in the real-world. In this paper, we discuss the methodology and tools for parsing abstract information through semantic analysis and extracting visual information through visual mapping. Namely, as to abstract informations are represented as relational structure and then mapped into visual structure using regular rule, user can obtain visual information. We suggest VOLS(Visual Object Layout System) to transform a abstract information to visual information. It can improve user understandability and assist a maintenance for existing source code.

• Journal of the Korea Computer Industry Society
• /
• v.8 no.4
• /
• pp.221-228
• /
• 2007

Many kinds of microcontrollers such as 8051, PIC16 and Atmega series are used for the automatic control system, home appliances and communication equipments manufacturing. It is very important to understand the basic operational principles of microcontrollers and their design concepts. There are many kinds of educational microcontroller trainers and also they are designed and assembled very complicatedly. For the students or developers, it is very difficult to catch the basic operation schemes and apply the techniques to the control system. And also it requires much cost and time for the various kinds of trainers purchasing. In this paper, standardization of pins layout and peripheral modules for the general microcontroller usage was introduced and tested with 89C2051, 89C51, PIC16F84, PIC16F877, Atmega8535 and Atmega128, etc. As a result of test, it was found that saving the cost and time using this suggested device was possible. And also it was very effective way to understand microcontroller design and programming techniques.