• Title/Summary/Keyword: Automatic Exploit Generation

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Prototype Kite Development for Wind Power Generation (고공풍력 발전용 시제품 Kite 비행체 개발)

  • Kwon, Jae-Wook;Kim, Jong-Chul;Moon, Sang-Man;Choi, Ji-Ung
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 2012.10a
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    • pp.259-260
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    • 2012
  • With increasing interest in alternative energy source for green growth, this document shows that the study of kite flight control is based on the concept of autonomous flight of kite can exploit the energy. Currently, prototype kite was designed and the purpose of its flight test, by manual flight control with Remote Controller, was performed for the feasibility of the full automatic flight control. For the future research, the test data should be collected through the many flight test under various environment.

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Input File Based Dynamic Symbolic Execution Method for Software Safety Verification (소프트웨어 안전성 검증을 위한 입력 파일 기반 동적 기호 실행 방법)

  • Park, Sunghyun;Kang, Sangyong;Kim, Hwisung;Noh, Bongnam
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.27 no.4
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    • pp.811-820
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    • 2017
  • Software automatic technology research recently focuses not only on generating a single path test-case, but also on finding an optimized path to reach the vulnerability through various test-cases. Although Dynamic Symbolic Execution (DSE) technology is popular among these automatic technologies, most DSE technology researches apply only to Linux binaries or specific modules themselves. However, most software are vulnerable based on input files. Therefore, this paper proposes an input file based dynamic symbolic execution method for software vulnerability verification. As a result of applying it to three kinds of actual binary software, it was possible to create a test-case effectively reaching the corresponding point through the proposed method. This demonstrates that DSE technology can be used to automate the analysis of actual software.

A Performance Evaluation of a RISC-Based Digital Signal Processor Architecture (RISC 기반 DSP 프로세서 아키텍쳐의 성능 평가)

  • Kang, Ji-Yang;Lee, Jong-Bok;Sung, Won-Yong
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.2
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    • pp.1-13
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    • 1999
  • As the complexity of DSP (Digital Signal Processing) applications increases, the need for new architectures supporting efficient high-level language compilers also grows. By combining several DSP processor specific features, such as single cycle MAC (Multiply-and-ACcumulate), direct memory access, automatic address generation, and hardware looping, with a RISC core having many general purpose registers and orthogonal instructions, a high-performance and compiler-friendly RISC-based DSP processors can be designed. In this study, we develop a code-converter that can exploit these DSP architectural features by post-processing compiler-generated assembly code, and evaluate the performance effects of each feature using seven DSP-kernel benchmarks and a QCELP vocoder program. Finally, we also compare the performances with several existing DSP processors, such as TMS320C3x, TMS320C54x, and TMS320C5x.

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