• Title/Summary/Keyword: Automatic Code Generator

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A XML Based Framework for Automatically Generating Control and Monitoring Software (제어 및 모니터링 소프트웨어 자동 생성을 위한 XML 기반 프레임웍)

  • Yoo Dae-Seung;Kim Jong-Hwan;Yi Myeong-Jae
    • Journal of KIISE:Computing Practices and Letters
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    • v.12 no.1
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    • pp.43-55
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    • 2006
  • In this paper, we present a framework which is used to develop, modify, maintain and extend a control and monitoring software easily for any kind of automatic instruments. The proposed framework is composed of three XML documents (IID, MAP, CMIML) and two tools (Virtual Instrument Wizard, Generator). Interface information of behaviors and states of instrument is written on IID. Mapping information between the interface information in IID and API of a real instrument driver is written on MAP Final information of the control and monitoring software is written on CMIML, IID, MAP and CMIML are written by XML format to provide a common usage and platform independence of the proposed framework. Vl Wizard generates CMIML intermediate platform independent document using IID and existing CMIML, and Generator generates the source code of a control and monitoring software platform dependent code automatically using CMIML and MAP. The suggested framework provides an easy development and maintenance because it automatically generates a control and monitoring software in GUI environment and it also provides common usage and platform independence in virtue of using description document of XML format. Also, reusability can be increased by reusing platform independent software description document and not reusing platform dependent software code.

Development of Template for Automatic Generation of Presentation Layer in J2EE-Based Web Applications (J2EE기반의 웹 애플리케이션을 위한 프리젠테이션 계층 자동생성 템플릿 개발)

  • 유철중;채정화;김송주;장옥배
    • Journal of KIISE:Computing Practices and Letters
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    • v.9 no.2
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    • pp.133-145
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    • 2003
  • Web applications based on J2EE($Java^{TM}$ 2 Platform, Enterprise Edition) were occurred for solution to overcome the limitations in time and space that the former applications had. Recently, lots of solutions using frameworks are being suggested to develope applications more quickly and efficiently. In this paper, we propose the template for several processes and types, which should be taken in presentation layer of web applications. This idea was based on the fact that web applications developers can concentrate on their specific tasks with independent manner in layered architecture. This template is XML-typed document that shows information about presentation layer of Web applications, which the user wants to compose. This template is inputted to the code generator. After then, the code generator generates skeleton code in presentation layer automatically after parsing information of XML documents. It means that we can develope Web applications more efficiently, by constructing skeleton code which inherits from hot spot classes of framework. Using this template and code generator, developer can develop Web applications with little practice and also is easy to cooperate with other developers to develop them just in time with distributing the standard development process.

Implementation of an Obfuscator for Visual C++ Source Code (비주얼 C++소스 코드를 위한 obfuscator 구현)

  • Chang, Hye-Young;Cho, Seong-Je
    • Journal of KIISE:Software and Applications
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    • v.35 no.2
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    • pp.59-69
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    • 2008
  • Automatic obfuscation is known to be the most viable method for preventing reverse engineering intentional1y making code more difficult to understand for security purposes. In this paper, we study and implement an obfuscation method for protecting MS Visual C++ programs against attack on the intellectual property in software like reverse engineering attack. That is, the paper describes the implementation of a code obfuscator, a tool which converts a Visual C++ source program into an equivalent one that is much harder to understand. We have used ANTLR parser generator for handling Visual C++ sources, and implemented some obfuscating transformations such as 'Remove comments', 'Scramble identifiers', 'Split variables', 'Fold array', 'Insert class', 'Extend loop condition', 'Add redundant operands', and 'Insert dead code'. We have also evaluated the performance and effectiveness of the obfuscator in terms of potency, resilience, and cost. When the obfuscated source code has been compared with the original source code, it has enough effectiveness for software protection though it incurs some run-time overheads.

Implementation and benchmarking of the local weight window generation function for OpenMC

  • Hu, Yuan;Yan, Sha;Qiu, Yuefeng
    • Nuclear Engineering and Technology
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    • v.54 no.10
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    • pp.3803-3810
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    • 2022
  • OpenMC is a community-driven open-source Monte Carlo neutron and photon transport simulation code. The Weight Window Mesh (WWM) function and an automatic Global Variance Reduction (GVR) method was recently developed and implemented in a developmental branch of OpenMC. This WWM function and GVR method broaden OpenMC's usage in general purposes deep penetration shielding calculations. However, the Local Variance Reduction (LVR) method, which suits the source-detector problem, is still missing in OpenMC. In this work, the Weight Window Generator (WWG) function has been developed and benchmarked for the same branch. This WWG function allows OpenMC to generate the WWM for the source-detector problem on its own. Single-material cases with varying shielding and sources were used to benchmark the WWG function and investigate how to set up the particle histories utilized in WWG-run and WWM-run. Results show that there is a maximum improvement of WWM generated by WWG. Based on the above results, instructions on determining the particle histories utilized in WWG-run and WWM-run for optimal computation efficiency are given and tested with a few multi-material cases. These benchmarks demonstrate the ability of the OpenMC WWG function and the above instructions for the source-detector problem. This developmental branch will be released and merged into the main distribution in the future.

A Transactor Implementation for SoC Verification with iPROVE (iPROVE 기반 SoC 검증을 위한 트랜잭터 구현)

  • Cho, Chong-Hyun;Cho, Joong-Hwee
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.4
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    • pp.73-79
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    • 2007
  • In this paper the proposed transactor is customized and a generator which roles of automatically generating the transactor according to DUT(Design Under Test)'s input and output is implemented. The customized transactor is designed by rearranging the signals of depending on DUT and transactor protocol which consists of signals of the PCI interface between host computer and FPGA(Field Programmable Gate Array). The implemented automatic generator of transactor generates a Verilog code of transactor by adding DUT's information about input and output ports. Performance and normal working of the generated transactor has been verified by experiments with some verified hardware IPs. Also, an efficiency of the transactor has been verified by comparing with user's manually designed transactor and generated transactor. Moreover, the generator's flexibility has been verified for DUT's information of variable input and output. In case of using the implemented generator, a design time of transactor is reduced.

APPLICATIONS OF INTEGRATED SAFETY ANALYSIS METHODOLOGY TO RELOAD SAFETY EVALUATION

  • Jang, Chan-Su;Um, Kil-Sup
    • Nuclear Engineering and Technology
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    • v.43 no.2
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    • pp.187-194
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    • 2011
  • Korea Nuclear Fuel is developing the X-GEN fuel which shows high performance and robust reliability for the worldwide supply. However, the simplified code systems such as CESEC-III which were developed in 1970s are still used in the current Non-LOCA safety analysis of OPR1000 and APR1400 plants. Therefore, it is essential to secure an advanced safety analysis methodology to make the best use of the merits of X-GEN fuel. To accomplish this purpose, the $\b{i}$ntegrated $\b{s}$afety $\b{a}$nalysis $\b{m}$ethodology (iSAM), is developed by selecting the best-estimate thermal-hydraulic code RETRAN. iSAM possesses remarkable advantages, such as generality, integrity, and designer-friendly features. That is, iSAM can be applied to both OPR1000 and APR1400 plants and uses only one computer code, RETRAN, in the whole scope of the non-LOCA safety analyses. Also the iSAM adopts the unique and automatic initialization and run tool, $\b{a}$utomatic $\b{s}$teady-$\b{s}$tate $\b{i}$nitialization and $\b{s}$afety analysis too l (ASSIST), to enable unhandy designers to use the new design code RETRAN without difficulty. In this paper, a brief overview of the iSAM is given, and the results of applying the iSAM to typical non-LOCA transients being checked during the reload design are reported. The typical non-LOCA transients selected are the single control element assembly withdrawal (SCEAW) accident, the asymmetric steam generator transients (ASGT), the locked rotor (LR) accident, and bank CEA withdrawal (BCEAW) event. Comparison to current licensing results shows a close resemblance; thus, it reveals that the iSAM can be applied to the non-LOCA safety analysis of OPR1000 and APR1400 plants.

Automatic BIST Circuit Generator for Embedded Memories (내장 메모리 테스트를 위한 BIST 회로 자동생성기)

  • Yang, Sunwoong;Chang, Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.10
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    • pp.746-753
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    • 2001
  • GenBIST implemented in this paper is an automatic CAD tool, which can automatically generate circuitry in VerilogHDL code based on user defined information for the memory testing. While most commercial and conventional CAD tools adopt a method in which they make memory-testing algorithms as a library to generate circuitry, our tool can generate circuitry according to the user-defined algorithm, which makes application of various algorithms easier. In addition, memory BIST circuitry can be shared with other memories by supporting embedded memories in our tool. Also, extra pins for the memory testing are not requited when boundary scan technique is combined.

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Design and Implementation of Automatic Script Generator for Mobile Database Applications (모바일 데이터베이스 응용을 위한 스크립트 자동 생성기의 설계 및 구현)

  • Eum, Doo-Hun
    • Journal of Internet Computing and Services
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    • v.10 no.4
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    • pp.71-85
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    • 2009
  • The demand for mobile database applications has been rapidly increased with the growth of mobile users and the development of wireless Internet technology. But the productivity of mobile applications is low and it takes much time to manage the versions of applications because the user interface and query processing code of applications is manually written. In this paper, we describe the design and implementation of the MobileGen that is a script generator for mobile database applications. The generated scripts enhance mobile application productivity by providing the code for operating with a database and processing user queries. Each script provides a corresponding deck that is a set of related cards as user interface. The MobileGen supports easy version management of generated applications and the MobileGen itself because it is based on the templates that are frameworks for scripts. Moreover, the MobileGen provides not only the interested entity but also the entities that are related directly and indirectly with the interested entity unlike the most commercial mobile script generators.

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시뮬레이션 코드 자동 생성을 위한 생산공정 모델링

  • 김대송;조현보;정무영
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 1996.04a
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    • pp.627-630
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    • 1996
  • One of the most common communication mechanisms to describe a situation or a process is a story written as an ordered sequence of events or activities. For example, a shop floor supervisor may present the operations of his manufacturing system by describing the processes of manunfacturing a product in his shop. Although IDEF3 is one of the most commonly used methods for describing a business process, but it is not common for a manufacturing process. In this study, we tried to apply IDEF3 for describing a manufacturing process. Problems and suggestions such as selection probability, programmable process modeling, manufacturing resource model were presented.

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The Design of Optical Marker for Auto-registering of 3D scan data (3차원 스캐너의 레지스터링 문제 해결을 위한 광학식 마커 설계)

  • 손용훈;양현석
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2003.06a
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    • pp.256-259
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    • 2003
  • This paper proposes OPTICAL MARKER fer registering process - one of the 3D measurement process : scan registering - merging - measurement. If the registering work is carried out manually, it can be accompanied with much time and many errors. Because the patterned marker make registering process automatic, many firms use it now. But the physical shape of existing markers is the source of the data loss caused by hiding surface, and the marker arrangement is the source of the time loss. The optical marker proposed in this paper has marker generator, organized a large number of binary coded control laser diode, separate from 3D scan object. So, it does not take much time for the marker disposition, and it is not the origin of the data loss, and the binary coded laser information make the auto-registering possible.

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