• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.11
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• pp.2075-2082
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• 2006

This paper presents modeling and optimization techniques for hish efficiency solar cell process on single-crystalline float zone (FZ) wafers. Among a sequence of multiple steps of fabrication, the followings are the most sensitive steps for the contact formation: 1) Emitter formation by diffusion; 2) Anti-reflection-coating (ARC) with silicon nitride using plasma-enhanced chemical vapor deposition (PECVD); 3) Screen-printing for front and back metalization; and 4) Contact formation by firing. In order to increase the performance of solar cells in terms of efficiency, the contact formation process is modeled and optimized using neural networks and genetic algorithms, respectively. This paper utilizes the design of experiments (DOE) in contact formation to reduce process time and fabrication costs. The experiments were designed by using central composite design which consists of 24 factorial design augmented by 8 axial points with three center points. After contact formation process, the efficiency of the fabricated solar cell is modeled using neural networks. Established efficiency model is then used for the analysis of the process characteristics and process optimization for more efficient solar cell fabrication.

• 한국신재생에너지학회:학술대회논문집
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• 2010.11a
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• pp.56.1-56.1
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• 2010

결정질 실리콘 태양전지의 표면 ARC(Anti-reflection Coating)layer는 반사도를 줄여 광 흡수율을 증가시키고, passivation 효과를 통하여 표면 재결합을 감소 시켜 태양전지의 효율을 높이는 중요한 역할을 한다. Silicon nitride 박막은 외부 stress 요인에 대해 안정성을 담보할 수 있어야한다. 따라서, 본 연구에서는 굴절률 가변에 따른 silicon nitride 박막을 PECVD를 이용하여 증착하고, 항온/항습 stability test를 통해 박막의 안정성을 확인하였다. Silicon nitride 증착을 위해 PECVD를 이용하였고, 공정압력 0.8Torr, 증착온도 $450^{\circ}C$, 증착파워 300W에서 실험을 진행하였다 박막의 굴절률은 1.9~2.3의 범위로 가변하였다. 항온/항습에 대한 신뢰성을 test 하기 위하여 5시간동안의 test를 1cycle로 하여 20회 동안 실험을 실시하였다. 증착된 silicon nitride 박막의 lifetime은 firing 이후 57.8us로 가장 높았으며, 항온/항습 test 이후에도 유사한 경향을 확인 할 수 있었다. 또한, 100h 동안의 항온/항습 test 결과 silicon nitride 박막의 lifetme 감소는 8.5%에 불과했다. 본 연구를 통하여 온도와 습도의 변화에 따른 결정질 실리콘 태양전지의 SiNx 박막의 증착 공정 조건에 대한 신뢰성을 확인 할 수 있었다.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2006.10a
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• pp.4-5
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• 2006

This paper represents modeling and optimization techniques for solar cell process on single-crystalline float zone (FZ) wafers with high efficiency; There were the four significant processes : i)emitter formation by diffusion, anti-reflection-coating (ARC) with silicon nitride using plasma-enhanced chemical vapor deposition (PECVD); iii)screen-printing for front and back metallization; and iv)contact formation by firing. In order to increase the performance of solar cells, the contact formation process is modeled and optimized. This paper utilizes the design of experiments (DOE) in contact formation to reduce process time, fabrication costs. The experiments were designed by using central composite design which is composed of $2^4$ factorial design augmented by 8 axial points with three center points. After contact formation process, the efficiency of the solar cell is modeled using neural networks. This model is used to analyse the characteristics of the process, and to optimize the process condition using genetic algorithms (GA). Finally, find optimal recipe for solar cell efficiency.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.244-244
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• 2010

Doping process of crystalline silicon solar cell process is very important which is as influential on efficiency of solar. Doping process consists of pre -deposition and diffusion. Each of these processes is important in the process temperature and process time. Through these process conditions variable, p-n junction depth can be controled to low and high. In this paper, we studied a optimized doping pre-deposition temperature for high solar cell efficiency. Using a $200{\mu}m$ thickness multi-crystalline silicon wafer, fixed conditions are texture condition, sheet resistance($50\;{\Omega}/sq$), ARC thickness(80nm), metal formation condition and edge isolation condition. The three variable conditions of pre-deposition temperature are $790^{\circ}C$, $805^{\circ}C$ and $820^{\circ}C$. In the $790^{\circ}C$ pre-deposition temperature, we achieved a best solar cell efficiency of 16.2%. Through this experiment result, we find a high efficiency condition in a low pre-deposition temperature than the high pre-deposition temperature. We optimized a pre-deposition temperature for high solar cell efficiency.

• 한국신재생에너지학회:학술대회논문집
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• 2011.05a
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• pp.112.1-112.1
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• 2011

The back contact solar cell (BCSC) has several advantages compared to the conventional solar cell since it can reduce grid shadowing loss and contact resistance between the electrode and the silicon substrate. This paper presents the effect of the surface texturing of the silicon BCSC by varying the texturing depth or the texturing gap in the commercially available simulation software, ATHENA and ATLAS of the company SILVACO. The texturing depth was varied from $5{\mu}m$ to $150{\mu}m$ and the texturing gap was varied from $1{\mu}m$ to $100{\mu}m$ in the simulation. The resulting efficiency of the silicon BCSC was evaluated depending on the texturing condition. The quantum efficiency and the I-V curve of the designed silicon BCSC was also obtained for the analysis since they are closely related with the solar cell efficiency. Other parameters of the simulated silicon BCSC are as follows. The substrate was an n-type silicon, which was doped with phosphorous at $6{\times}10^{15}cm^{-3}$, and its thickness was $180{\mu}m$, a typical thickness of commercial solar cell substrate thickness. The back surface field (BSF) was $1{\times}10^{20}\;cm^{-3}$ and the doping concentration of a boron doped emitter was $8.5{\times}10^{19}\;cm^{-3}$. The pitch of the silicon BCSC was $1250{\mu}m$ and the anti-reflection coating (ARC) SiN thickness was $0.079{\mu}m$. It was assumed that the texturing was anisotropic etching of crystalline silicon, resulting in texturing angle of 54.7 degrees. The best efficiency was 25.6264% when texturing depth was $50{\mu}m$ with zero texturing gap in case of low texturing depth (< $100{\mu}m$).

• Current Photovoltaic Research
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• v.2 no.4
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• pp.173-176
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• 2014

We have investigated the seed layer formation of front side contact using the inkjet printing process. Conductive silver ink was printed on textured Si wafers with 80 nm thick $SiN_x$ anti reflection coating (ARC) layers and thickened by light induced plating (LIP). The inkjet printable sliver inks were specifically formulated for inkjet printing on these substrates. Also, a novel method to prepare nano-sized glass frits by the sol-gel process with particle sizes around 5 nm is presented. Furthermore, dispersion stability of the formulated ink was measured using a Turbiscan. By implementing these glass frits, it was found that a continuous and uniform seed layer with a line width of $40{\mu}m$ could be formed by a inkjet printing process. We also investigated the contact resistance between the front contact and emitter using the transfer length model (TLM). On an emitter with the sheet resistance of $60{\Omega}/sq$, a specific contact resistance (${\rho}_c$) below $10m{\Omega}{\cdot}cm^2$ could be achieved at a peak firing temperature around $700^{\circ}C$. In addition, the correlation between the contact resistance and interface microstructures were studied using scanning electron microscopy (SEM). We found that the added glass particles act as a very effective fire through agent, and Ag crystallites are formed along the interface glass layer.

• Korean Journal of Materials Research
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• v.29 no.11
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• pp.697-702
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• 2019

In this study, using a wet chemical process, we evaluate the effectiveness of different solution concentrations in removing layers from a solar cell, which is necessary for recovery of high-purity silicon. A 4-step wet etching process is applied to a 6-inch back surface field(BSF) solar cell. The metal electrode is removed in the first and second steps of the process, and the anti-reflection coating(ARC) is removed in the third step. In the fourth step, high purity silicon is recovered by simultaneously removing the emitter and the BSF layer from the solar cell. It is confirmed by inductively coupled plasma mass spectroscopy(ICP-MS) and secondary ion mass spectroscopy(SIMS) analyses that the effectiveness of layer removal increases with increasing chemical concentrations. The purity of silicon recovered through the process, using the optimal concentration for each process, is analyzed using inductively coupled plasma atomic emission spectroscopy(ICP-AES). In addition, the silicon wafer is recovered through optimum etching conditions for silicon recovery, and the solar cell is remanufactured using this recovered silicon wafer. The efficiency of the remanufactured solar cell is very similar to that of a commercial wafer-based solar cell, and sufficient for use in the PV industry.

• Journal of the Korean Vacuum Society
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• v.20 no.3
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• pp.225-232
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• 2011

Reactive ion etching (RIE) technique for maskless surface texturing of mc-silicon solar wafers has been applied and succeed in fabricating a grass-like black-silicon with an average reflectance of $4{\pm}1%$ in a wavelength range of 300~1,200 nm. In order to investigate the optimized texturing conditions for mass production of high quantum efficiency solar cell Surface characteristics such as the spatial distribution of average reflectance, micrscopic surface morphology and minority carrier lifetime were monitored for samples from saw-damaged $15.6{\times}15.6\;cm^2$ bare wafer to key-processed wafers as well as the mc-Si solar cells. We observed that RIE textured wafers reveal lower average reflectance along from center to edges by 1% and referred the origin to the non-uniform surface structures with a depth of 2 times deeper and half-maximum width of 3 times. Samples with anti-reflection coating after forming emitter layer also revealed longer minority carrier lifetime by 40% for the edge compared to wafer center due to size effects. As results, mc-Si solar cells with RIE-textured surface also revealed higher efficiency by 2% and better external quantum efficiency by 15% for edge positions with higher height.