• The Journal of the Korea Contents Association
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• v.13 no.10
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• pp.54-61
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• 2013

This paper presents a simplified hardware based edge detection circuit which is based on an analog correlator combining with the neighbor pixels in CMOS image sensor. A pixel element of the edge detector consists of an active pixel sensor and an analog correlator circuit which connects two neighbor pixels. The edge detector shares a comparator on each column that the comparator decides an edge of the target pixel with an adjustable reference voltage. The circuit detects image edge from CIS directly that reduces area and power consumption 4 times and 20%, respectively, compared with the previous works. And also it has advantage to regulate sensitivity of the edge detection because the threshold value is able to control externally. The fabricated chip has 34% of fill factor and 0.9 ${\mu}W$ of power per a pixel under 0.18 ${\mu}m$ CMOS technology.

• Proceedings of the KSRS Conference
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• 2002.10a
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• pp.587-592
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• 2002

A new digital correlator fur an airborne synthetic aperture radiometer was designed in order to replace the conventional analog correlator unit which will become very complicated while the number of channels is increasing. The digital correlator uses digital IQ demodulator instead of the intermediate frequency (IF) phase shifter to make the correlation processing performed digitally at base band instead of analogly at IF. This technique has been applied to the digital receiver in softradio. The down-converted IF signals from each pair of receiver channels become low rate base-band digital signals after under-sampled, Digitally Down-Converted (DDC), decimated and filtered by FIR filters. The digital signals are further processed by two digital multipliers (complex correlation), the products are integrated by the integrators and finally the outputs from the integrators compose of the real part and the imaginary part of a sample of the visibility function. This design is tested by comparing the results from digital correlators and that from analog correlators. They are agreed with each other very well. Due to the fact that the digital correlators are realized with the help of Analog-Digital Converter (ADC) chips and the FPGA technology, the realized volume, mass, power consumption and complexity turned out to be greatly reduced compared with that of the analog correlators. Simulations show that the resolution of ADC has an influence on the synthesized antenna patterns, but this can be neglected if more than 2bit is used.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.9 no.4
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• pp.179-183
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• 1984

Only K=$log_2$N reference patterns called principal components are sufficient to identify one out of N characters, calculated by computer and fablicated. An incogerent optical correlator is used for correlation coefficient measurements and it is shown that that this method has better discrimination ability that analog measuments using matched filter.

• ETRI Journal
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• v.30 no.4
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• pp.495-505
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• 2008

This paper presents a parallel processing searcher structure for the initial synchronization of a direct sequence ultra-wideband (DS-UWB) system, which is suitable for the digital implementation of baseband functionalities with a 1.32 Gsample/s chip rate analog-to-digital converter. An initial timing acquisition algorithm and a data demodulation method are also studied. The proposed searcher effectively acquires initial symbol and frame timing during the preamble transmission period. A hardware efficient receiver structure using 24 parallel digital correlators for binary phase-shift keying DS-UWB transmission is presented. The proposed correlator structure operating at 55 MHz is shared for correlation operations in a searcher, a channel estimator, and the demodulator of a RAKE receiver. We also present a pseudo-random noise sequence generated with a primitive polynomial, $1+x^2+x^5$, for packet detection, automatic gain control, and initial timing acquisition. Simulation results show that the performance of the proposed parallel processing searcher employing the presented pseudo-random noise sequence outperforms that employing a preamble sequence in the IEEE 802.15.3a DS-UWB proposal.

• Journal of The Korean Astronomical Society
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• v.38 no.2
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• pp.103-106
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• 2005

The Submillimeter Array (SMA), a collaborative project of the Smithsonian Astrophysical Observatory (SAO) and the Academia Sinica Institute of Astronomy & Astrophysics (ASIAA), has begun operation on Mauna Kea in Hawaii. A total of eight 6-m radio telescopes comprise the array with currently working receiver bands at 230, 345, and 690 GHz. The array will have 8 receiver bands covering the frequency range of 180-900 GHz. The backend is flexible analog-digital correlator with a full bandwidth of 2GHz, which is very powerful to cover several line emissions simultaneously. The current status and future plans of the SMA are described with emphasis on Taiwanese efforts.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.5
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• pp.493-502
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• 2009

In this paper, we compare the performance of initial timing acquisition in direct sequence ultra-wideband(DS-UWB) systems with different transmit pulse shaping filters through extensive computer simulations. Simulation results show that the timing acquisition performance of the DS-UWB system, whose chip rate is 1.32 Gchip/s, employing a rectangular transmit filter is similar to that employing a square root raised cosine(SRRC) filter with an interpolation factor of 4 in the realistic UWB channels(CM1 and CM3) as well as the additive white Gaussian noise(AWGN) channel. Additionally, we present both a 24-parallel digital correlator structure and a 24-parallel processing searcher operating at a 55 MHz system clock, and then briefly discuss the initial timing acquisition procedure. Because we can adopt an 1.32 Gsample/s digital-to-analog(D/A) converter and an 1.32 Gsample/s analog-to-digital(AID) converter in the DS-UWB system by employing the rectangular transmit filter, we have a realistic solution for the DS-UWB chipset development.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.3
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• pp.587-594
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• 2010

In this paper, we propose an asynchronous IR-UWB ranging system based on the two-way ranging protocol. The periodic pulse sequence is used to measure a distance between two devices. At the receiver, a received signal is first transformed into a frequency-domain signal using an analog correlator bank and digital signal processing is followed in the frequency-domain. This make it possible for the system to use an ADC with a conversion speed of pulse rate. The proposed algorithm at the receiver side includes a peak detection procedure using mutipath channel compensation and matched filtering, and retransmits a pulse sequence synchronized with the detected peak. The validity of the proposed algorithm is verified from simulation results where the CM1 channel is assumed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.10
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• pp.769-778
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• 2017

In this paper, a self-interference signal cancellation(SIC) circult for In-band Full-Duplex has been developed and tested in RF/analog region. By use of this SIC circuit, a FM two-way radio has been developed working at FRS(Family Radio Service) band. The two-way radio device is transmitting the FM modulated signal and demodulating the wanted FM signal at the same time. A circulator is used to enable a single antenna to transmit and receive simuultaenously. The receiver circuit needs to cancel out the self-interference signal due to the transmit signal. A vector modulator(VM) is used to control the phase and magnitude of the esitmated signal. And in-phase and quadrature correlators are used to figure out the optimal coefficients of the VM to remove the self-interference signal according to the change of channel environment. In this work, SA58646 has been used as the FM transceiver, and the system is tested with a frequency of 465 MHz and a bandwidth of 12.5 kHz FM signal. The output power is 17.2 dBm at the antenna port, and the self intererence signal level is measured -49.2 dBm at the receiver end. Therefore the SIC level is measured by 66.4 dB.