• Title/Summary/Keyword: Algorithmic State Machine(ASM)

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A Motor Position Detecting Method Using Algorithmic State Machine(ASM) (ASM을 이용한 전동기의 위치 검출 방법)

  • 김지원;전영환;전진홍;전정우;강도현
    • The Transactions of the Korean Institute of Power Electronics
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    • v.7 no.1
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    • pp.11-17
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    • 2002
  • This paper describes on a position detection method for the motors which have repetitive operations using the Algorithmic State Machine(ASM), one of the digital logic design methods. With analyses for the incremental encoder output patterns, state diagram and state table are constructed and a digital circuit which can detect the changing point of direction of motor rotation is designed. To verify the validity of the designed circuit, simulations for all cases in which the direction of motor rotation is changed, are performed. Simulation results show the designed digital circuit can detect the direction of motor rotation accurately for all cases.

ASM Chart and SDL for VLSI Logic Design Automation (VLSI의 논리 설계 자동화를 위한 ASM 도표와 SDL)

  • Cho, Joung Hwee;Chong, Jung Wha
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.23 no.2
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    • pp.269-277
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    • 1986
  • This paper proposes a new algorithmic state machine(ASM) chart and a new hardware description for automatic logic design of VLSI. To describe the behavioral characteristics of the design specification, the conventional ASM chart is modified, and a new hardware description language, SDL, is proposed. The SDL is one-to-one correspondent to the proposed ASM chart symbol, and can be used in a hierachical design of VLSI. As a design example, we obtain a logic circuit diagram of gate lebel utilizing a SDL hardware compiler after drawing an ASM chart and describing in SDL.

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A Study on a Hardware Folw-Chart and Hardware Description Language for FSM (FSM 설계를 위한 하드웨어 흐름도와 하드웨어 기술 언어에 관한 연구)

  • Lee, Byung-Ho;Cho, Joong-Hwee;Chong, Jong-Wha
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.4
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    • pp.127-137
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    • 1989
  • This paper describes hardware flow-chart and SDL-II, which are register-transfer level, to automate logic design. Hardware flow-chart specifies behavioral and structural charaterstics of generalized FSMs (Finite State Machine) usin the modified ASM (Algorithmic State Machnine) design techniques. SDL-II describes the hardware flow-chat which specifies the control and the data path of ASIC(Application Specific IC). Also many examples are enumerated to illustrate the features of hardware flow-chart and SDL-II.

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