• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.4
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• pp.202-208
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• 2001

In Recent results suggested that doping $Ta_2O_5$ with a small amount of $TiO_2$ using standard ceramic processing techniques can increase the dielectric constant of $Ta_2O_5$ significantly. In this paper, this concept is studied using RTCVD (Rapid Thermal Chemical Vapor Deposition). Ti-doped $Ta_2O_5$ films are deposited using $TaC_{12}H_{30}O_5N$, $C_8H_{24}N_4Ti$, and $O_2$ on both Si and $NH_3$-nitrided Si substrates. An $NH_3$-based interface layer at the Si surface is used to prevent interfacial oxidation during the CVD process and post deposition annealing is performed in $H_2/O_2$ ambient to improve film quality and reduce leakage current. A sputtered TiN layer is used as a diffusion barrier between the Al gate electrode and the $TaTi_xO_y$ dielectric. XPS analyses confirm the formation of a ($Ta_2O_5)_{1-x}(TiO_2)_x$ composite oxide. A high quality $TaTi_xO_y$ gate stack with EOT (Equivalent Oxide Thickness) of $7{\AA}$ and leakage current $Jg=O.5A/textrm{cm}^2$ @ Vg=-1.0V has been achieved. We have also succeeded in forming a $TaTi_x/O_y$ composite oxide by rapid thermal oxidation of the as-deposited CVD TaTi films. The electrical properties and Jg-EOT characteristics of these composite oxides are remarkably similar to that of RTCVD $Ta_2O_5, suggesting that the dielectric constant of $Ta_2O_5$ is not affected by the addition of $TiO_2$.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.115-115
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• 1999

GaN는 직접천이형 wide band gap(3.4eV) 반도체로서 청색/자외선 발광소자 및 고출력 전자장비등에의 응용성 때문에 폭넓게 연구되고 있다. 이러한 넓은 분야의 응용을 위해서는 열 적으로 안정된 Ohmic contact을 반드시 실현되어야 한다. n-type GaN의 경우에는 GaN계면에서의 N vacancy가 n-type carrier로 작용하기 때문에 Ti, Al, 같은 금속을 접합하여 nitride를 형성함에 의해서 낮은 접촉저항을 갖는 Ohmic contact을 하기가 쉽다. 그러나 p-type의 경우에는 일 함수가 크고 n-type와 다르게 nitride가 형성되지 않는 금속이 Ohmic contact을 할 가능성이 많다. 시료는 HF(HF:H2O=1:1)에서 10분간 초음파 세척을 한 후 깨끗한 물에 충분히 헹구었다. 그런 후에 고순도 Ar 가스로 건조시켰다. Pd와 Ni은 열적 증착법(thermal evaporation)을 사용하여 p-GaN에 상온에서 증착하였다. 현 연구에서는 열처리에 의한 Pd의 clustering을 줄이기 위해서 wetting이 좋은 Ni을 Pd 증착 전과 후에 삽입하였으며, monchromatic XPS(x-ray photoelectron spectroscopy) 와 SAM(scanning Auger microscopy)을 사용하여 열처리 전과 40$0^{\circ}C$, 52$0^{\circ}C$ 그리고 695$0^{\circ}C$에서 3분간 열처리 후의 온도에 따른 morphology 변화, 계면반응(interfacial reaction) 및 벤드 휨(band bending)을 비교 연구하였다. Nls core level peak를 사용한 band bending에서 Schottky barrier height는 Pd/Ni bi-layer 접합시 2.1eV를, Ni/Pd bi-layer의 경우에 2.01eV를 얻었으며, 이는 Pd와 Ni의 이상적인 Schottky barrier height 값 2.38eV, 2.35eV와 비교해 볼 때 매우 유사한 값임을 알 수 있다. 시료를 후열처리함에 의해 52$0^{\circ}C$까지는 barrier height는 큰 변화가 없으나, $650^{\circ}C$에서 3분 열처리 후에 0.36eV, 0.28eV 만큼 band가 더 ？을 알 수 있었다. Pd/Ni 및 Ni/Pd 접합시 $650^{\circ}C$까지 후 열 처리 과정에서 계면에서 matallic Ga은 온도에 비례하여 많은 양이 형성되어 표면으로 편석(segregation)되어지나, In-situ SAM을 이용한 depth profile을 통해서 Ni/Pd, Pd/Ni는 증착시 uniform하게 성장함을 알 수 있었으며, 후열처리 함에 의해서 점차적으로 morphology 의 변화가 일어나기 시작함을 볼 수 있었다. 이는 $650^{\circ}C$에서 열처리 한후의 ex-situ AFM을 통해서 재확인 할 수 있었다. 이상의 결과로부터 GaN에 Pd를 접합 시 심한 clustering이 형성되어 Ohoic contact에 문제가 있으나 Pd/Ni 혹은 Ni/Pd bi-layer를 사용함에 의해서 clustering의 크기를 줄일 수 있었다. Clustering의 크기는 Ni/Pd bi-layer의 경우가 작았으며, $650^{\circ}C$ 열처리 후에 barrier height는 Pd/Ni bi-layer의 경우에도 Ni의 영향을 받음을 알 수 있었다.

• Korean Journal of Optics and Photonics
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• v.24 no.5
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• pp.224-230
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• 2013

Laser Lift-Off (LLO) is a process that removes a GaN or AIN thin layer from a sapphire wafer to manufacture vertical-type LEDs. It consists of a light source, an attenuator, a mask, a projection lens and a beam homogenizer. In this paper, we design an attenuator and a projection lens. We use the 'ZEMAX' optical design software for analysis of depth of focus and for a projection lens design which makes $7{\times}7mm^2$ beam size by projecting a beam on a wafer. Using the 'LightTools' lighting design software, we analyze the size and uniformity of the beam projected by the projection lens on the wafer. The performance analysis found that the size of the square-shaped beam is $6.97{\times}6.96mm^2$, with 91.8 % uniformity and ${\pm}30{\mu}m$ focus depth. In addition, this study performs dielectric coating using the 'Essential Macleod' to increase the transmittance of an attenuator. As a result, for 23 layers of thin films, the transmittance total has 10-96% at angle of incidence $45-60^{\circ}$ in S-polarization.

• Proceedings of the Korean Vacuum Society Conference
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• 1998.02a
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• pp.133-133
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• 1998

In the thin film alloy formation of the transition metals ion-beam-mixing technique forms a metastable structure which cannot be found in the arc-melted metal alloys. Sppecifically it is well known that the studies about the electronic structure of ion-beam-mixed alloys pprovide the useful information in understanding the metastable structures in the metal alloy. We studied the electronic change in the ion-beam-mixed ppt-Ct alloys by XppS and XANES. These analysis tools pprovide us information about the charge transfer in the valence band of intermetallic bonding. The multi-layered films were depposited on the SiO2 substrate by the sequential electron beam evapporation at a ppressure of less than 5$\times$10-7 Torr. These compprise of 4 ppairs of ppt and Cu layers where thicknesses of each layer were varied in order to change the alloy compposition. Ion-beam-mixing pprocess was carried out with 80 keV Ae+ ions with a dose of $1.5\times$ 1016 Ar+/cm2 at room tempperature. The core and valence level energy shift in these system were investigated by x-ray pphotoelectron sppectroscoppy(XppS) pphotoelectrons were excited by monochromatized Al K ａ(1486.6 eV) The ppass energy of the hemisppherical analyzer was 23.5 eV. Core-level binding energies were calibrated with the Fermi level edge. ppt L3-edge and Cu K-edge XANES sppectra were measured with the flourescence mode detector at the 3C1 beam line of the ppLS (ppohang light source). By using the change of White line(WL) area of the each metal sites and the core level shift we can obtain the information about the electrons pparticippating in the intermetallic bonding of the ion-beam-mixed alloys.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.363-363
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• 2008

The development of dry etching process for sapphire wafer with plasma has been key issues for the opto-electric devices. The challenges are increasing control and obtaining low plasma induced-damage because an unwanted scattering of radiation is caused by the spatial disorder of pattern and variation of surface roughness. The plasma-induced damages during plasma etching process can be classified as impurity contamination of residual etch products or bonding disruption in lattice due to charged particle bombardment. Therefor, fine pattern technology with low damaged etching process and high etch rate are urgently needed. Until now, there are a lot of reports on the etching of sapphire wafer with using $Cl_2$/Ar, $BCl_3$/Ar, HBr/Ar and so on [1]. However, the etch behavior of sapphire wafer have investigated with variation of only one parameter while other parameters are fixed. In this study, we investigated the effect of pressure and other parameters on the etch rate and the selectivity. We selected $BCl_3$ as an etch ant because $BCl_3$ plasmas are widely used in etching process of oxide materials. In plasma, the $BCl_3$ molecule can be dissociated into B radical, $B^+$ ion, Cl radical and $Cl^+$ ion. However, the $BCl_3$ molecule can be dissociated into B radical or $B^+$ ion easier than Cl radical or $Cl^+$ ion. First, we evaluated the etch behaviors of sapphire wafer in $BCl_3$/additive gases (Ar, $N_2,Cl_2$) gases. The behavior of etch rate of sapphire substrate was monitored as a function of additive gas ratio to $BCl_3$ based plasma, total flow rate, r.f. power, d.c. bias under different pressures of 5 mTorr, 10 mTorr, 20 mTorr and 30 mTorr. The etch rates of sapphire wafer, $SiO_2$ and PR were measured with using alpha step surface profiler. In order to understand the changes of radicals, volume density of Cl, B radical and BCl molecule were investigated with optical emission spectroscopy (OES). The chemical states of $Al_2O_3$ thin films were studied with energy dispersive X-ray (EDX) and depth profile anlysis of auger electron spectroscopy (AES). The enhancement of sapphire substrate can be explained by the reactive ion etching mechanism with the competition of the formation of volatile $AlCl_3$, $Al_2Cl_6$ or $BOCl_3$ and the sputter effect by energetic ions.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.259-259
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• 2016

반도체 산업 전반에 걸쳐 이루어지고 있는 연구는 소자를 더 작게 만들면서도 구동능력은 우수한 소자를 만들어내는 것이라고 할 수 있다. 따라서 소자의 미세화와 함께 트랜지스터의 구동능력의 향상을 위한 기술개발에 대한 필요성이 점차 커지고 있으며, 고유전(high-k)재료를 트랜지스터의 게이트 절연막으로 이용하는 방법이 개발되고 있다. High-k 재료를 트랜지스터의 게이트 절연막에 적용하면 낮은 전압으로 소자를 구동할 수 있어서 소비전력이 감소하고 소자의 미세화 측면에서도 매우 유리하다. 그러나, 초미세화된 소자를 제작하기 위하여 high-k 절연막의 두께를 줄이게 되면, 전기적 용량(capacitance)은 커지지만 에너지 밴드 오프셋(band-offset)이 기존의 실리콘 산화막(SiO2)보다 작고 또한 열공정에 의해 쉽게 결정화가 이루어지기 때문에 누설전류가 발생하여 소자의 열화를 초래할 수 있다. 따라서, 최근에는 이러한 문제를 해결하기 위하여 게이트 절연막 엔지니어링을 통해서 누설전류를 줄이면서 전기적 용량을 확보할 수 있는 연구가 주목받고 있다. 본 실험에서는 high-k 물질인 Ta2O5와 SiO2를 적층시켜서 누설전류를 줄이면서 동시에 높은 캐패시턴스를 달성할 수 있는 게이트 절연막 엔지니어링에 대한 연구를 진행하였다. 먼저 n-type Si 기판을 표준 RCA 세정한 다음, RF sputter를 사용하여 두께가 Ta2O5/SiO2 = 50/0, 50/5, 50/10, 25/10, 25/5 nm인 적층구조의 게이트 절연막을 형성하였다. 다음으로 Al 게이트 전극을 150 nm의 두께로 증착한 다음, 전기적 특성 개선을 위하여 furnace N2 분위기에서 $400^{\circ}C$로 30분간 후속 열처리를 진행하여 MOS capacitor 소자를 제작하였고, I-V 및 C-V 측정을 통하여 형성된 게이트 절연막의 전기적 특성을 평가하였다. 그 결과, Ta2O5/SiO2 = 50/0, 50/5, 50/10 nm인 게이트 절연막들은 누설전류는 낮지만, 큰 용량을 얻을 수 없었다. 한편, Ta2O5/SiO2 = 25/10, 25/5 nm의 조합에서는 충분한 용량을 확보할 수 있었다. 적층된 게이트 절연막의 유전상수는 25/5 nm, 25/10 nm 각각 8.3, 7.6으로 비슷하였지만, 문턱치 전압(VTH)은 각각 -0.64 V, -0.18 V로 25/10 nm가 0 V에 보다 근접한 값을 나타내었다. 한편, 누설전류는 25/10 nm가 25/5 nm보다 약 20 nA (@5 V) 낮은 것을 확인할 수 있었으며 절연파괴전압(breakdown voltage)도 증가한 것을 확인하였다. 결론적으로 Ta2O5/SiO2 적층 절연막의 두께가 25nm/10nm에서 최적의 특성을 얻을 수 있었으며, 본 실험과 같이 게이트 절연막 엔지니어링을 통하여 효과적으로 누설전류를 줄이고 게이트 용량을 증가시킴으로써 고집적화된 소자의 제작에 유용한 기술로 기대된다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.477-477
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• 2008

For more than three decades, the gate dielectrics in CMOS devices are $SiO_2$ because of its blocking properties of current in insulated gate FET channels. As the dimensions of feature size have been scaled down (width and the thickness is reduced down to 50 urn and 2 urn or less), gate leakage current is increased and reliability of $SiO_2$ is reduced. Many metal oxides such as $TiO_2$, $Ta_2O_4$, $SrTiO_3$, $Al_2O_3$, $HfO_2$ and $ZrO_2$ have been challenged for memory devices. These materials posses relatively high dielectric constant, but $HfO_2$ and $Al_2O_3$ did not provide sufficient advantages over $SiO_2$ or $Si_3N_4$ because of reaction with Si substrate. Recently, $HfO_2$ have been attracted attention because Hf forms the most stable oxide with the highest heat of formation. In addition, Hf can reduce the native oxide layer by creating $HfO_2$. However, new gate oxide candidates must satisfy a standard CMOS process. In order to fabricate high density memories with small feature size, the plasma etch process should be developed by well understanding and optimizing plasma behaviors. Therefore, it is necessary that the etch behavior of $HfO_2$ and plasma parameters are systematically investigated as functions of process parameters including gas mixing ratio, rf power, pressure and temperature to determine the mechanism of plasma induced damage. However, there is few studies on the the etch mechanism and the surface reactions in $BCl_3$ based plasma to etch $HfO_2$ thin films. In this work, the samples of $HfO_2$ were prepared on Si wafer with using atomic layer deposition. In our previous work, the maximum etch rate of $BCl_3$/Ar were obtained 20% $BCl_3$/ 80% Ar. Over 20% $BCl_3$ addition, the etch rate of $HfO_2$ decreased. The etching rate of $HfO_2$ and selectivity of $HfO_2$ to Si were investigated with using in inductively coupled plasma etching system (ICP) and $BCl_3/Cl_2$/Ar plasma. The change of volume densities of radical and atoms were monitored with using optical emission spectroscopy analysis (OES). The variations of components of etched surfaces for $HfO_2$ was investigated with using x-ray photo electron spectroscopy (XPS). In order to investigate the accumulation of etch by products during etch process, the exposed surface of $HfO_2$ in $BCl_3/Cl_2$/Ar plasma was compared with surface of as-doped $HfO_2$ and all the surfaces of samples were examined with field emission scanning electron microscopy and atomic force microscope (AFM).