• Title/Summary/Keyword: Active neutral point clamped five-level inverter

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Subsection Synchronous Current Harmonic Minimum Pulse Width Modulation for ANPC-5L Inverter

  • Feng, Jiuyi;Song, Wenxiang;Xu, Yuan;Wang, Fei
    • Journal of Electrical Engineering and Technology
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    • v.12 no.5
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    • pp.1872-1882
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    • 2017
  • Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.

A Novel Hybrid Five-Level Inverter for Medium-Voltage Applications (중전압 응용을 위한 새로운 하이브리드 5-레벨 인버터)

  • Dao, Ngoc Dat;Lee, Dong-Choon
    • Proceedings of the KIPE Conference
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    • 2016.07a
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    • pp.485-486
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    • 2016
  • This paper proposes a new hybrid five-level voltage-source inverter topology, based on the conventional five-level active neutral-point-clamped topology (5L-ANPC), where the lower number of switching devices is required, resulting in saving the cost. The operating principle and control method of the proposed topology is described. The comparison of THD, power losses, loss distribution, and cost of components are evaluated among the proposed topology, the 5L-ANPC and 5L-DCI (diode-clamped inverters) topology.

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Common-Mode Voltage Elimination with an Auxiliary Half-Bridge Circuit for Five-Level Active NPC Inverters

  • Le, Quoc Anh;Park, Do-Hyeon;Lee, Dong-Choon
    • Journal of Power Electronics
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    • v.17 no.4
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    • pp.923-932
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    • 2017
  • This paper proposes a novel scheme which can compensate the common-mode voltage (CMV) for five-level active neutralpoint clamped (5L-ANPC) inverters, which is based on modifying the space vector pulse width modulation (SVPWM) and adding an auxiliary leg to the inverter. For the modified SVPWM, only the 55 voltage vectors producing low CMV values among the 125 possible voltage vectors are utilized, which varies over the three voltage levels of $-V_{dc}/12$, 0 V, and $V_{dc}/12$. In addition, the compensating voltage, which is injected into the 5L-ANPC inverter system to cancel the remaining CVM through a common-mode transformer (CMT) is generated by the additional NPC leg. By the proposed method, the CMV of the inverter is fully eliminated, while the utilization of the DC-link voltage is not decreased at all. Furthermore, all of the DC-link and flying capacitor voltages of the inverter are well controlled. Simulation and experimental results have verified the validity of the proposed scheme.