• The KIPS Transactions:PartC
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• v.10C no.4
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• pp.463-470
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• 2003

Many types of switching fabrics have been proposed for use in ATM networks. Multistage Interconnection Networks (MINs) constitute a large class of ATM switching systems that are widely used in today´s internetworking. One of the most veil-known types of multistage networks is the banyan network. The banyan network is attractive for its simple routing scheme and low hardware complexity, but its throughput is very limited due to internal blocking and output contention. In this paper, we propose an input-buffered dual-banyan switch model with multiple switching fabric between switch input and output to avoid internal and Head-of Line blocking. By performance analysis and simulation, we show that our model has a lower ceil delay and 96% throughput which is much better than other banyan-type switch architecture.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.3
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• pp.391-400
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• 1994

Recently, the development of ATM switch, a backbone system of BISDN, is receiving worldwide study. Because the development of large communication equipments like a switching system need a lot of time and cost, the performance evaluation by menas of simulation is needed for the higher efficiency of development before actual implementation. So, a general and objective input environment is necessary for proper simulation. The main purpose of this paper is to offer a traffic generator which can provide such input environment as a file for computer simulation of ATM switch. To offer diverse input environment of ATM switch, we select parameters, and implement ATM traffic generator with software technology. Basides, a program to verify the propriety of ATM traffic generator in also proposed. It is expected that the proposed ATM traffic generator will offer diverse input environment for computer simulation to evaluate new ATM switching system, not influenced by any system structure.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.12
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• pp.3144-3153
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• 1996

ATM switching system is made up of transport network and control newrk according to its functions. The control device, basic part of control network must be developed before developing any other functions, and control device must be stable and need high reliability. Out distributed ATM switching system consists of several ALSs that provides variable local call services, and an ACS that interconnect among several ALSs. Eech ALS has CCCP that takes charage of call and connection control functions, and ACS has an OMP that takes charge of OA&M(Operation, Administration and Maintenance) functios. In this paper, we analyzed the performance evaluation of control device that manipulate subscriber's call based on ITU-T Q.2931 standard protocol messages and Interprocessor communication messages. As a result of simulation when the number of ALS is under 22, as the call arrival rate increase the processor utilization of CCCP increase rapidly than that of OMP. When the number of ALS is incremented to 22, the processor utilization of CCCP is balanced with the of OMP, and when the number of ALS exceeds 22, the processor utiliztion of OMP increase rapidly. Also if messary processing time of OMP is 1.35 times that of CCCP, processor utilizations of CCCP and OMP is equal.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.9 no.4
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• pp.497-503
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• 1997

In the present study, the cooling package using the heat pipe has been developed to improve the thermal performance in the point of cooling characteristics of the electronic chip placed to the subrack being readily assembled and disassembled in ATM switching system. As the preliminary experiments, the cooling performances between a conventional way using a cooling fin and a proposed method applying the heat pipe are compared and analyzed. The cooling performance at a simulated electronic component packaging a heat pipe module is approximately achieved up to $5.0W/cm^2$ heat flux and the allowable temperature at the heated chip is sustained in the range within $70^{\circ}C$. From the results, it is confirmed that temperature oscillations are also settled by inserted wick in the evaporator section. From the user's viewpoint, the method to assemble and disassemble the heat pipe easily has been devised.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1998.11a
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• pp.299-304
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• 1998

초고속 정보통신망에서 ATM 사용자와 ATM 망간의 접속을 위한 ATM 정합장치는 ATM 통신 방식으로 ATM 교환기와 정합하는 각종 정합장치로 구성된다. ATM 정합장치는 155.520 Mbps의 선로 속도를 갖는 기본속도(STM-1 : Synchronous Transport Module-1) 정합장치와 44.736 Mbps의 선로 속도를 갖는 중속(DS-3 : Digital Signal-level 3) 정합장치, 그리고 2.048 Mbps 혹은 1.544 Mbps의 선로 속도를 갖는 저속(DS-l/E) 정합장치, 622.08 Ups의 선로 속도를 갖는 고속(STM4) 정합 장치로 구성된다. 본 논문에서는 ATM 저속, 중속, 기본속도 및 고속 정합장치의 기능 및 구현에 대하여 기술하였다.

• Journal of the Korea Society of Computer and Information
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• v.7 no.4
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• pp.150-156
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• 2002

In this paper, the traffic carrying capacity of the IMT-2000 ATM-MSC is analyzed by using the reference throughput based on ITU-R. The IMT-2000 services are classified into circuit switching(speech. circuit-switched data. high interactive multimedia) and packet switching(simple message, medium multimedia, high multimedia). The indoor vehicle and pedestrian users are considered. The AAL type 2 for the speech are considered. The ratio of indoor：pedestrian：vehicle are assumed to be 40：40：20%, and size 256 of ATM-MSC are designed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.12A
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• pp.1985-1991
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• 1999

In this paper, complete and general two-port lumped Spice-network model is developed for a lossy transmission line. This model is realized as a Spice subcircuit, by means of standard lumped network elements and mathematical functions. It is used as a component in the time-domain simulation of a high-speed data transmission line such as IMI(Inter Module Interface) data path in HANbit ACE 64 ATM switching system. The only required Spice network elements are resistance and frequency-dependent controlled-voltage sources. Such frequency-dependent sources are realized by utilizing the standard Hspice mathematical functions FREQ, DELAY, and POLY.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.4
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• pp.10-19
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• 1998

With the advent of high-speed networks, the increasingly stringent performance requeirements are being placed on the underlying switching systems. Under these circumstances, simulation methods for evaluating the performace of such a switch requires vast computational cost and accordingly the importance of anlytical methods increases. In general, the performance analysis of a switch architecture is also a very difficult task in that the conventional queueing system such as switching systems, which consists of a large numbe of queues which interact with each other in a fiarly complicated manner. To overcome these difficulties, most of the past research results assumed that multiple queues become decoupled as the switch size grows unboundely large, which enables the conventional queueing theory to be applied. In this apepr, w analyze a non-blocking space-division ATM swtich with input queueing, and prove analytically the pheonomenon that virtual queues formed by the head-of-line cells become decoupled as the switch size grows unboundedly large. We also establish various properties of the limiting queue size processes so obtained and compute the maximum throughput associated with ATM switches with input queueing.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.6A
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• pp.1060-1066
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• 2001

레이어2 스위칭과 레이어3 라우팅의 통합 모델로써 MPLS(Multi-Protocol Label Switching) 환경에서 ATM LSR(Label-Switching Routers)은 백본망에서의 고속 전송이 가능하여 현재의 라우터 구조로써 제안되어지고 있다. MPLS가 코어 라이터로써 적용이 될 경우 확장성을 위해 label merging이라는 기술이 필요하다. VC(Virtual Circuit) merging은 ATM LSR에서 많은 IP 라우터를 하나의 라벨로 매핑을 시키며 수천 개의 목적지에 전송할 수 있는 확장성 있는 매핑 기술이다. VC merging은 같은 목적지인 다른 패킷들 간의 셀들의 섞임을 방지하기 위해 재 조합 버퍼가 요구된다. 재 조합 버퍼 사용시 일시적인 체증 현상이 발생하며 Non-VC merging과 비교시 많은 셀 손실과 많은 버퍼를 요구하게 된다. 본 논문에서는 RED(Random Early Detection) 알고리즘을 적용하여 VC merging이 필요한 버퍼의 요구량과 셀 손실을 줄였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.12
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• pp.2828-2833
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• 1997

In this paepr, we have proposed an enhanced TDM with WDM hybrid photonic switching architecture, which has much simpler configuration and requires less hard ware. the basic module consists of arrayed waveguide grating (AWG) for wavelength division, compressor and fiber delay lines for time division. When compared with other systems, we proved that the proposed switch is suitable for large capacity photonic switching system due to less complexity and lower cost in implementation than the previous ones.