• Title/Summary/Keyword: ATM

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The structure of ATM Switch with the Shared Buffer Memory and The Construction of Switching Network for Large Capacity ATM (대용량 ATM을 위한 공유 버퍼 메모리 스위치 구조 및 교환 망의 구성 방안)

  • 양충렬;김진태
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.1
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    • pp.80-90
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    • 1996
  • The efficienty of ATM is based on the statical multiplexing of fixed-length packets, which are called cells. The most important technical point for realizing ATM switching network is an arrangement of the buffers and switches. Current most ATM switching networks are being achieved by using the switching modules based on the unit switch of $8{\times}8$ 150Mb/s or $16{\times}16$ 150Mb/s, the unit switch of $32{\times}32$150Mb/s for a large scale system is under study in many countries. In this paper, we proposed a new $32{\times}32$(4.9Gb/s throughput) ATM switch using Shared buffer memory switch which provides superior traffic characteristics in the cell loss, delay and throughput performance and easy LSI(Large Scale Integrated circuit). We analytically estimated and simulated by computer the buffer size into it. We also proposed the configuration of the large capacity ATM switching network($M{\times}M$.M>1,000) consisting of multistage to improve the link speed by non-blocking.

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Congestion Control Mechanism using Real Time Signaling Information in ATM based MPLS Network (ATM 기반 MPLS 망에서 실시간 신호정보를 이용한 체증 제어 기법)

  • Ahn, Gwi-Im
    • Journal of Korea Multimedia Society
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    • v.10 no.4
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    • pp.462-469
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    • 2007
  • ATM protocol has the techniques such as cell discarding priority, traffic shaping and traffic policing. ATM based MPLS(Multiprotocol Label Switching) is discussed for its provisioning QoS commitment capabilities, traffic engineering and smooth migration for BcN using conventional ATM infra in Korea. This paper proposes preventive congestion control mechanism for detecting HTR(Hard To Reach) LSP(Label Switched Path) in ATM based MPLS systems. In particular, we decide HTR LSP using real time signaling information(etc., PTI,AIS/RDI) for applying HTR concept in circuit switching to ATM based MPLS systems and use those session gap and percentage based control algorithm that were used in conventional PSTN call controls. We concluded that it maximized the efficiency of network resources by restricting ineffective machine attempts. Proposed control can handle 208% call processing and more than 147% success call, than those without control. It can handle 187% BHCA(Busy Hour Call Attempts) with 100 times less than use of exchange memory.

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A method of AAL(SSCOP) protocol conformance testing and its result analysis in ATM network (ATM망에서 프로토콜(SSCOP) 적합성 시험 방법 및 결과 분석 방법)

  • 장동원
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.10
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    • pp.2348-2356
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    • 1997
  • This paper describes a method of AAL(SSCOP) protocol conformance testing and its result analysis in ATM network. Terminal equipment(TE) that implements protocols for connecting ATM network shall be verified if appropriately implement by conformance testing. The protocol specifications and the testing methodology are recommended or standardized by international standardization organization(ITU-T, ISO, etc.). The ATM AAL (SSCOP) protocol which selected for describing conformance test procedure is standardized in ITU-T Q.2110 and ATM Forum UNI 3.1 which are same in contents. Also Testing standard like ATS for SSCOP is specified in ATM Forum 95-1459R2. Construction of conformance testing environment is necessary to coordinate in relations with standards, then testing must beexecuted at that environment and the results from the test system analyzed. For this, it is necessary to select any test case from standard for testing and to make ETS. The ETS is proted on the test system and conformance testing will execute on that system. Finally the result from the test system is to analyze. This conformance testing procedure is applicable to the same other test cases in SSCOP and protocols in any communcation networks.

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Implementation of Next Generation DSL Networks (차세대 DSL망의 구현 방안)

  • Park Seung-Chul
    • Journal of KIISE:Information Networking
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    • v.32 no.2
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    • pp.236-243
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    • 2005
  • Most of the existing legacy DSL networks, about 80 million lines world-widely, adopted ‘ATM(Asynchronous Transfer Mode) over DSL’protocol architecture for the effective interworking with the ATM-based regional backbone networks and for the effective support of native ATM-based multimedia application services. Recently, however, the regional backbone networks are moving towards Metro Ethernet networks, instead of the ATM networks, and most of the current multimedia applications are If-based, not native ATM-based. These environmental changes push the architecture of DSL networks to be accordingly changed, and the‘Ethernet over DSL’protocol architecture, instead of existing‘ATM over DSL’, is tried to be applied to the implementation of next generation DSL networks such as VDSL(Very high-rate DSL) . In this paper, we propose two different implementation models for next generation DSL networks in Metro Ethernet backbone environments, respectively EA(Ethernet-to-ATM) implementation model and RE(Ethernet-to-Ethernet) implementation model. And, a comparative analysis focused on the performance and the backward compatability with the legacy DSL networks will be presented.

HTR(Hard-To-Reach) Code Registration methods and Fuzzy controls using network signaling information in ATM systems (ATM시스템에서 네트웨크 시그날링 정보를 이용한 HTR(Hard-To-Reach) 등록방법 및 퍼지제어 방법)

  • Chul Soo, Kim;Jung tae, Lee
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.9
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    • pp.55-65
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    • 2004
  • ATM was recommended by the ITU and ATM Forum as a means of transportation for B-ISDN. At this time, due to the comprehensive mature of ATM protocol, ATM has been adapted as the backbone system for carrying Internet traffi $c^{[1,2,3,4]}$. But major conceptsregarding the ATN protocol will be used on future technology. This paper presents preventive congestion control mechanisms for detecting HTR(Hard-To Reach) code in ATM systems, in particular for an improved HTR call registration method using network signaling information will discussed. In high speed circuit switching system environments, a fast HTR control mechanism is necessary. We present research results for improving HTR call registration and control methods using network signaling information and fuzzy control mechanisms. We concluded that it showed fast congestion avoidance mechanisms with a fewer system load maximized the efficiency of network resources by restricting ineffective machine attempts.

Implementation of TMN Agent for ATM switch : considering integration of agent into ATM switch (ATM 교환기를 위한 TMN 관리 대행 시스템의 구현)

  • 황희산;이병윤;이길행;우왕돈
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.5
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    • pp.1360-1371
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    • 1998
  • There are many implementation methods according to models integrating TMN Agent into an ATM switch. In this paper, we evaluate the integrating models for integrating the Agent into an ATM switch in the aspects of the size of MIB(Management Information Base), the internal protocol profiles and the facility of implementation. Based on the evaluation, we choose an integrating model and implment the Agent. To ensure merit of the model, we propose an interface for exchanging management information between the Agent and an ATM switch. We also show the feasibility of our Agent system through some filed testes for the average processing time.

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A Study on Packet Security of ATM Firewall Switch (ATM 방화벽 스위치 기반의 패킷 보안에 관한 연구)

  • 임청규
    • Journal of the Korea Society of Computer and Information
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    • v.8 no.3
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    • pp.100-106
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    • 2003
  • This paper presents the design of a value-added ATM switch. The ATM switch ca perform CAC Processing and Firewall Processing Routine at packet-level (IP) at the ATM environment per port. The proposed two routine are integrated into the components of ATM switch. The Firewall switch employs a suggested two routine model to avoid or reduce the latency caused by filtering. Also, we suggest four classes are defined. namely, classes A, B, C, and D, which are orded from the safest to the most dangerous. The suggested model performance of ATM Firewall switch is estimated simulation in terms of the throught and latency by computer.

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The Simulation of High-Speed Forwarding IP Packet with ATM Switch (ATM 스위치를 이용한 IP 패킷 고속 전송 시뮬레이션)

  • Heo, Kang-Woo;Lee, Myung-Ho
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.10
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    • pp.2764-2771
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    • 1999
  • ATM has recently received much attention because of its high capacity, its bandwidth scalability, and its ability to support multiservice traffic. However, ATM is connection oriented whereas the vast majority of modern data networking protocols are connectionless. The alternative to support current service on ATM will be a router with attached switching hardware that has the ability to cache routing decisions. In this paper, we described the router using a switch and simulated the performance. From the results of the simulation, the routing delay was decreased as the number of flow channels. Cell-delay was shortest at 30,000 cell-time when the keeping time of a flow channel was. The line utilization was rapidly decrease when a flow-setup time is 20 30 cell-time. The results of this simulation could be applied to predict the performance of the router using ATM switch.

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Performance Evaluation of TCP/IP on ATM LAM Testbed (ATM LAN 시험망에서 TCP/IP 프로토콜의 성능분석)

  • Jang, Woo-Hyun;Lee, Se-Yul;Hwang, Sun-Myung;Lee, Bong-Hwan
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.12
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    • pp.3634-3641
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    • 1999
  • LAN Emulation and IPOA are the two most widei y accepted network protocols which allow to provide conventional LAN-based data services on ATM LAN environment. In this paper, the performance of IPOA and LAN Emulation on ATM LAN testbed is compared and the results are compared with performance of Ethernet as well. For performance comparison, metrics such as application throughput, latency, CPU usage are used. In addition, a network program that uses the socket based TCP/IP application programming interface to send large data files from client to server via ATM LAN switch is developed. IPOA provides lower latency and higher throughput than LAN Emulation while LAN Emulation consumes more CPU usage.

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Design of Code Converter for Development and Verification of Real-Time System in Software Round-Trip Engineering Environment (순환공학 환경에서의 실시간 시스템 개발 및 검증을 위한 코드 변환기 설계)

  • Ko, Hyun;Joe, Sang-Kyu;Kim, Kwang-Jong;Lee, Yon-Sik
    • Proceedings of the Korea Information Processing Society Conference
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    • 2001.04a
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    • pp.193-196
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    • 2001
  • 본 논문은 ATM(Abstract Timed Machine)으로 명세된 실시간 시스템에 대한 재/역공학 측면에서의 개발 및 검증을 위한 코드 변환기를 설계한다. ATM은 모드(mede), 전이(transition), 포트(per)로 구성되는데, 순공학 과정에서 실시간 시스템을 설계, 명세 하는 기존의 정형기법과는 달리 ATM은 소프트웨어의 순환공학 과정에서 사용하기 위해 설계되었다. ATM은 기존 정형기법이 순공학 과정에서의 특정 물리적 환경에서 실행되는 동적행위에 대한 부적절한 표현에 대해 순환공학에서 실시간 시스템의 속성은 물론 특정 환경과 동적 정보 등을 명세하기 위한 정형 기법으로서, 본 논문에서는 DoME을 이용하여 ATM 명세도구를 개발하고 이를 이용하여 실시간 시스템의 특정 요구사항을 위한 ATM을 명세한다. 또한 해당 ATM을 DOME/ATM 스크립트 파일로 저장하고 이에 대한 명세분석을 통해 노드와 관련된 정보를 추출하여 다른 분석도구가 이용할 수 있도록 DB에 저장하거나 매개 언어인 SRL/ATM으로 변환하며, 이러한 SRL/ATM으로부터 실행코드에 대한 관련 정보를 추출하여 실시간 시스템 개발 및 검증을 위한 Ada 코드를 생성할 수 있는 코드 변환기를 설계한다.

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