• Proceedings of the IEEK Conference
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• 2003.07d
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• pp.1399-1402
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• 2003

Paul Hocker has developed new attacks based on the electric consumption of cryptographic device such as smartcard that performs cryptographic computation. Among those attacks, the Differential Power Analysis(DPA) is one of the most impressive and most difficult to avoid. By analysing the power dissipation of encryption in a device, the secret information inside can be deduced. This paper presents that Advanced Encryption Standard(AES) is highly vulnerable to DPA and readily leaks away all secret keys through the experimental results for DPA. After all, it is required an implementation of the AES algorithm that is not vulnerable to DPA. We also propose countermeasures that employ asynchronous circuit.

• Proceedings of the Korea Information Processing Society Conference
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• 2014.04a
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• pp.119-120
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• 2014

오늘 날 중요한 정보를 보호하기 위해 정보의 암호화 작업이 필수요소로 자리잡았다. 하지만 데이터의 크기가 커지면 암호화 처리 시간이 크게 증가하는 문제가 있었다. 본 연구는 GPGPU의 CUDA 프로그래밍 모델을 사용하여 고처리율 AES 를 병렬 암호화하는 기법을 제안하였다. 기존의 기법과 비교하여 제안한 CUDA overlapping 기법을 약 31% 정도 처리 시간을 단축시킬 수 있었다.

• Proceedings of the Korea Information Processing Society Conference
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• 2023.05a
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• pp.172-173
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• 2023

2018년 NIST에서 AEAD 형태의 암호를 가진 경량 암호 표준화 공모를 진행하였다. 이후 2라운드를 통해 최종적으로 10개의 경량 암호가 남게 되었고, 이후 2023년 2월에 ASCON 암호가 NIST 경량 암호 표준으로 지정되었다. 경량 암호의 표준이 된 만큼, 기존에 사용되던 AEAD 암호와는 속도나 메모리 사용량 등, 저사양 기기에 특화된 차이점이 존재할 것이다. 본 논문에서는 저사양 기기의 환경에서, 기존 AEAD 암호에 해당하는 AES-GCM과 이번 표준으로 지정된 ASCON 암호를Arduino-Uno에서 직접 실행함으로써 성능 면에서 어떤 차이점이 있는지 보인다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.257-260
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• 2002

This paper describes a design of cryptographic processor that implements the AES (Advanced Encryption Standard) block cipher algorithm“Rijndael”. To achieve high throughput rate, a sub-pipeline stage is inserted into the round transformation block, resulting that the second half of current round function and the first half of next round function are being simultaneously operated. For area-efficient and low-power implementation the round transformation block is designed to share the hardware resources in encryption and decryption. An efficient scheme for on-the-fly key scheduling, which supports the three master-key lengths of 128-b/192-b/256-b, is devised to generate round keys in the first sub-pipeline stage of each round processing. The cryptoprocessor designed in Verilog-HDL was verified using Xilinx FPGA board and test system. The core synthesized using 0.35-${\mu}{\textrm}{m}$ CMOS cell library consists of about 25,000 gates. Simulation results show that it has a throughput of about 520-Mbits/sec with 220-MHz clock frequency at 2.5-V supply.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.19 no.4
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• pp.21-28
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• 2009

In the recent years, power attacks were widely investigated, and so various countermeasures have been proposed, In the case of block ciphers, masking methods that blind the intermediate values in the algorithm computations(encryption, decryption, and key-schedule) are well-known among these countermeasures. But the cost of non-linear part is extremely high in the masking method of block cipher, and so the inversion of S-box is the most significant part in the case of AES. This fact make various countermeasures be proposed for reducing the cost of masking inversion and Zakeri's method using normal bases over the composite field is known to be most efficient algorithm among these masking method. We rearrange the masking inversion operation over the composite field and so can find duplicated multiplications. Because of these duplicated multiplications, our method can reduce about 10.5% gates in comparison with Zakeri's method.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.12 no.5
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• pp.15-25
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• 2002

In this paper a design of high performance cryptographic processor which implements AES Rijndael algorithm is described. To eliminate performance degradation due to round-key computation delay of conventional processor, the on-the-fly precomputation of round key based on modified round structure is adopted. And on-the-fly round key generator which supports 128, 192, and 256-bit key has modular structure. The designed processor has iterative structure which uses 1 clock cycle per round and supports three operation modes, such as ECB, CBC, and CTR mode which is a candidate for new AES modes of operation. The cryptographic processor designed in Verilog-HDL and synthesized using 0.251$\mu\textrm{m}$ CMOS cell library consists of about 51,000 gates. Simulation results show that the critical path delay is about 7.5ns and it can operate up to 125Mhz clock frequency at 2.5V supply. Its peak performance is about 1.45Gbps encryption or decryption rate under 128-bit key ECB mode.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39B no.12
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• pp.822-830
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• 2014

Recently, A Security service in Internet environments has been more important and the use of SSL & TLS is increasing for the personel homepage as well as administrative institutions. Also, IETF suggests using DTLS, which can provide a security service to constrained devices with lower CPU power and limited memory space under IoT environments. In this paper, we implement LEA(Lightweight Encryption Algorithm) algorithm and apply it to OpenSSL. The implemented algorithm is compared with other symmetric encryption algorithms such as AES etc, and it shows the superior performance in calculation speed.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.33 no.3
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• pp.363-374
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• 2023

A white-box environment refers to a situation where the internal information of an algorithm is disclosed. The AES white-box encryption was first announced in 2002, and in 2016, a side-channel analysis for white-box encryption called Differential Computation Analysis (DCA) was proposed. DCA analysis is a powerful side-channel attack technique that uses the memory information of white-box encryption as side-channel information to find the key. Although various countermeasure studies against DCA have been published domestically and internationally, there were no evaluated or analyzed results from experiments applying the hiding technique using dummy operations to DCA analysis. Therefore, in this paper, we insert LU T-shaped dummy operations into the WBC-AES algorithm proposed by S. Chow in 2002 and quantitatively evaluate the degree of change in DCA analysis response depending on the size of the dummy. Compared to the DCA analysis proposed in 2016, which recovers a total of 16 bytes of the key, the countermeasure proposed in this paper was unable to recover up to 11 bytes of the key as the size of the dummy decreased, resulting in a maximum decrease in attack performance of about 68.8%, which is about 31.2% lower than the existing attack performance. The countermeasure proposed in this paper confirms that the attack performance significantly decreases as smaller dummy sizes are inserted and can be applied in various fields.

• Journal of Internet of Things and Convergence
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• v.2 no.3
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• pp.43-51
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• 2016

In this paper, we have developed Crypft+ as an enhanced file encryption/decryption system to improve the security of IoT system or individual document file management process. The Crypft+ system was developed as a core security module using Python, and designed and implemented a user interface using PyQt. We also implemented encryption and decryption function of important files stored in the computer system using AES based symmetric key encryption algorithm and SHA-512 based hash algorithm. In addition, Cx-Freezes module is used to convert the program as an exe-based executable code. Additionally, the manual for understanding the Cryptft+ SW is included in the internal program so that it can be downloaded directly.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.5
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• pp.3086-3092
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• 2014

The FTP that provides file transfer capabilities to/from another station cannot provides data confidentialities. The FTPS and SFTP can support a security functionalities. The FTPS needs a SSL layer and SFTP use a functions of SSH. And therefore the FTPS or SFTP needs an additional modules such as SSL or SSH. In this paper, we propose a new Secured FTP protocol that can support the security functions without extra security system. The Secured FTP uses Diffie-Hellman key agreement algorithm for shared secret key generation and AES-Counter algorithm for data encryption algorithm. Our designed Secured FTP is implemented in Linux environments and the proper operations of implemented Secured FTP is verified.