• Title/Summary/Keyword: AES algorithm

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Residual Echo Suppression Based on Tracking Echo-Presence Uncertainty (Tracking Echo-Presence Uncertainty 기반의 잔여 반향 억제)

  • Park, Yun-Sik;Chang, Joon-Hyuk
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.10C
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    • pp.955-960
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    • 2009
  • In this paper, we propose a novel approach to residual echo suppression (RES) algorithm based on tracking echo-presence uncertainty (TEPU) to improve the performance of acoustic echo suppression (AES) in the frequency domain. In the proposed method, the ratio of the microphone input and the echo-suppressed output signal power is employed as the threshold value for the decision rule to estimate the echo-presence uncertainty applied to the RES filter. The proposed RES scheme estimates the echo presence uncertainty in each frequency bin and effectively reduces residual echo signal in a simple fashion. The performance of the proposed algorithm is evaluated by the objective test and yields better results compared with the conventional schemes.

Analysis of Encryption Algorithm Performance by Workload in BigData Platform (빅데이터 플랫폼 환경에서의 워크로드별 암호화 알고리즘 성능 분석)

  • Lee, Sunju;Hur, Junbeom
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.29 no.6
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    • pp.1305-1317
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    • 2019
  • Although encryption for data protection is essential in the big data platform environment of public institutions and corporations, much performance verification studies on encryption algorithms considering actual big data workloads have not been conducted. In this paper, we analyzed the performance change of AES, ARIA, and 3DES for each of six workloads of big data by adding data and nodes in MongoDB environment. This enables us to identify the optimal block-based cryptographic algorithm for each workload in the big data platform environment, and test the performance of MongoDB by testing various workloads in data and node configurations using the NoSQL Database Benchmark (YCSB). We propose an optimized architecture that takes into account.

CKGS: A Way Of Compressed Key Guessing Space to Reduce Ghost Peaks

  • Li, Di;Li, Lang;Ou, Yu
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.16 no.3
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    • pp.1047-1062
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    • 2022
  • Differential power analysis (DPA) is disturbed by ghost peaks. There is a phenomenon that the mean absolute difference (MAD) value of the wrong key is higher than the correct key. We propose a compressed key guessing space (CKGS) scheme to solve this problem and analyze the AES algorithm. The DPA based on this scheme is named CKGS-DPA. Unlike traditional DPA, the CKGS-DPA uses two power leakage points for a combined attack. The first power leakage point is used to determine the key candidate interval, and the second is used for the final attack. First, we study the law of MAD values distribution when the attack point is AddRoundKey and explain why this point is not suitable for DPA. According to this law, we modify the selection function to change the distribution of MAD values. Then a key-related value screening algorithm is proposed to obtain key information. Finally, we construct two key candidate intervals of size 16 and reduce the key guessing space of the SubBytes attack from 256 to 32. Simulation experimental results show that CKGS-DPA reduces the power traces demand by 25% compared with DPA. Experiments performed on the ASCAD dataset show that CKGS-DPA reduces the power traces demand by at least 41% compared with DPA.

Implementation of Rijndael Block Cipher Algorithm

  • Lee, Yun-Kyung;Park, Young-Soo
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.164-167
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    • 2002
  • This paper presents the design of Rijndael crypto-processor with 128 bits, 192 bits and 256 bits key size. In October 2000 Rijndael cryptographic algorithm is selected as AES(Advanced Encryption Standard) by NIST(National Institute of Standards and Technology). Rijndael algorithm is strong in any known attacks. And it can be efficiently implemented in both hardware and software. We implement Rijndael algorithm in hardware, because hardware implementation gives more fast encryptioN/decryption speed and more physically secure. We implemented Rijndael algorithm for 128 bits, 192 bits and 256 bits key size with VHDL, synthesized with Synopsys, and simulated with ModelSim. This crypto-processor is implemented using on-the-fly key generation method and using lookup table for S-box/SI-box. And the order of Inverse Shift Row operation and Inverse Substitution operation is exchanged in decryption round operation of Rijndael algorithm. It brings about decrease of the total gate count. Crypto-processor implemented in these methods is applied to mobile systems and smart cards, because it has moderate gate count and high speed.

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Modified Feistel Network Block Cipher Algorithm (변형 피스탈 네트워크 블록 암호 알고리즘)

  • Cho, Gyeong-Yeon;Song, Hong-Bok
    • Journal of the Korea Computer Industry Society
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    • v.10 no.3
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    • pp.105-114
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    • 2009
  • In this paper a modified Feistel network 128 bit block cipher algorithm is proposed. The proposed algorithm has a 128, 196 or 256 bit key and it updates a selected 32 bit word from input value whole by deformed Feistel Network structure. Existing of such structural special quality is getting into block cipher algorithms and big distinction. The proposed block cipher algorithm shows much improved software speed compared with international standard block cipher algorithm AES and domestic standard block cipher algorithm SEED and ARIA. It may be utilized much in same field coming smart card that must perform in limited environment if use these special quality.

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Enabling Energy Efficient Image Encryption using Approximate Memoization

  • Hong, Seongmin;Im, Jaehyung;Islam, SM Mazharul;You, Jaehee;Park, Yongjun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.3
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    • pp.465-472
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    • 2017
  • Security has become one of the most important requirements for various devices for multi-sensor based embedded systems. The AES (Advanced Encryption Standard) algorithm is widely used for security, however, it requires high computing power. In order to reduce the CPU power for the data encryption of images, we propose a new image encryption module using hardware memoization, which can reuse previously generated data. However, as image pixel data are slightly different each other, the reuse rate of the simple memoization system is low. Therefore, we further apply an approximate concept to the memoization system to have a higher reuse rate by sacrificing quality. With the novel technique, the throughput can be highly improved by 23.98% with 14.88% energy savings with image quality loss minimization.

DES Algorithm and its Implementation in School Mathematics Education (DES를 이용한 암호의 이해와 활용 및 DES에서 한글 구현)

  • 정상조;박중수
    • Journal of the Korean School Mathematics Society
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    • v.6 no.2
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    • pp.101-115
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    • 2003
  • DES is a very simple crytosystem that uses only permutation in mathematics. Recently AES is standardized based on DES. In this paper we introduce DES and its implementation. In particular, we tried to process Hangul in DES. This paper may be used in school mathematics education.

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Study of the Cryptographic Processor Design appropriate for the RFID system (RFID system을 위한 AES 암호프로세서 설계에 관한 연구)

  • Kang, Young-Jin
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.11
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    • pp.6815-6820
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    • 2014
  • The creation of a RFID/USN environment has increased rapidly due to the activation of ubiquitous security environment suitable for RFID/USN environment but has failed to comply with the speed of security threats. Therefore, this thesis presents MSNR suitable for RFID/USN. The MSNR presented showed an increase in the processing rate of 1.3 times compared to the existing AES and showed 2 fold improvement in performance in terms of the overall system efficiency. Therefore, MSNR is considered to be a password algorithm suitable to overcome the conditions of environmental resource conditions, such as RFID/USN.

The fast image encryption algorithm based on substitution and diffusion

  • Zhang, Yong;Jia, Xiaoyang
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.12 no.9
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    • pp.4487-4511
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    • 2018
  • A fast image encryption system based on substitution and diffusion was proposed, which includes one covering process, one substitution process and two diffusion processes. At first, Chen's chaotic system together with an external 256-bit long secret key was used to generate the key streams for image encryption, in which the initial values of Chen's chaotic system were regarded as the public key. Then the plain image was masked by the covering process. After that the resulting image was substituted with the disturbed S-Box of AES. Finally, the substituted image was diffused twice with the add-modulo operations as the core to obtain the cipher image. Simulation analysis and comparison results with AES and some existing image cryptosystems show that the proposed image cryptosystem possesses the merits of fast encryption/decryption speed, good statistical characteristics, strong sensitivity and etc., and can be used as a candidate system of network security communication.

An Implementation on the Computing Algorithm for Inverse Finite Field using Composite Field (합성체를 이용한 유한체의 역원 계산 알고리즘 구현)

  • Noh Jin-Soo;Rhee Kang-Hyeon
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.43 no.3 s.309
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    • pp.76-81
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    • 2006
  • Recently, Finite field is applied the cryptography in the modern multimedia communication. Especially, block codes such as Elliptic Curve Cryptosystem and Reed-Solomon code among the error correcting codes are defined with finite field. Also, finite field algorithm is conducting the research actively because many kind of application parts need the real time operating ability therefore the exclusive hardware have been implementing. In this paper, we proposed the inverse finite field algorithm over GF($2^8$) using finite composite field and implemented in a hardware, and then compare this hardware with the currently used 'Itoh and Tsujii' hardware in respect to structure, area and computation time. Furthermore, this hardware was inserted into the AES SubBytes block and implemented on FPGA emulator board to confirm that the superiority of the proposed algorithm through the performance evaluation.