• Proceedings of the Acoustical Society of Korea Conference
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• 1998.08a
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• pp.121-126
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• 1998

고정 소수점 DSP 인 analog devices 사의 ADSP-2181을 이용하여 실시간 G.723.1 음성부호화기를 개발한 사례이다. G.723.1은 ITU에서 개발한 세계 표준 음성 부호화기로 낮은 전송율에서 고음질을 얻을 수 있다. 본 논문에서는 고정 소수점 DSP를 이용하여 부호화기를 갭라하는데 필요한 사항들을 제시하였다. 먼저 1절에서는 DAM성 부호화기의 특성에 대한 개괄을 설명하고, 2절에서는 G.723.1 부호화기의 특징을, 3절에서는 고정소수점 DSP를 이용하여 개발하는 과정을, 4절에서는 구현결과를 분석하였으며, 마지막으로 5절에서 결론을 맺는다.

• Speech Sciences
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• v.3
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• pp.177-186
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• 1998

This paper describes the procedure of implementing a real-time speech codec, G.723.1 which was developed by DSP Group and standardized by ITU-T, using fixed-point DSP, ADSP-2181. This codec has two bit rates associated with it, 5.3 and 6.3 kbit/s. We implemented only one bit rate, 6.3 kbit/s, of the two with fixed-point 32-bit precision. According to the result of the experiment, the amount of computational burden is about 55 MIPS and its quality is similar to the result of the PC simulation with floating-point arithmetic. In this paper, we proposed a method to use a fixed-point DSP and a procedure for developing a real-time speech codec using DSPs and finally developed a G.723.l speech codec for ADSP-2181.

• Proceedings of the KIEE Conference
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• 1996.07b
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• pp.1380-1382
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• 1996

In this paper, a motion estimation module is made with ADSP-21020 based on MPEG-2 which is an international standard for moving picture compression. And, the block matching algorithm used as motion estimation method is easy for an hardware implementation. The ADSP-21020 of Analog Device is used for a main control processor. We used three block matching method (exhaustive search method, 2D-logarithmic search method, three step search method) for software simulation and implemented the three step search method to hardware. For the test of the estimation module, we used ping pong image sequences and mobile and calendar image sequences.

• Proceedings of the Acoustical Society of Korea Conference
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• 1994.06c
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• pp.61-64
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• 1994

디지털 신호를 처리하기 위해 특별히 제작된 ADSP-2105는 빠른 Fied-point 연산과 Harvard-architecture로 구조화됐기 때문에 빠른 수행연산을 할 수 가 있다. 본 논문은 이 DSP 프로세서를 이용해 음성신호의 실시간 FFT 분석에 관한 방법을 소개한다. 실시간 FFT 분석기로서의 DSP 보드는 크게 음성신호를 받는 입력부분과 FFT를 계산하는 FFT 부분으로 나뉘어지는데, 입력부분은 AD1849로 8KHz로 데이터를 샘플링해 받게 되었고, FFT 부분은 실제로 DSP가 FFT를 수행하는 부분으로 되어있다. 실시간 처리를 구현하기 위해 입력 부분은 두 개의 뱅크로 만들어 한 뱅크에서 음성신호를 받아들이는 동안에 다른 뱅크에서는 FFT를 계산하도록 되어있어서 DSP 보드는 항시 음성신호를 샘플링 할 수 있는 상태를 유지할 수 있다. 그리고 FFT 처리부는 빠른 처리로 음성신호를 샘츨링할 뱅크가 채워지기 전에 실행되게 프로그램되어 있어 실제적으로 모든 음성데이타를 FFT 하게 되어있다.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.2
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• pp.95-102
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• 1996

This paper describes the realization of a rela-time adaptive acoustic echo canceller, which adopts a microprogramming method, for removing acoustical echoes in speakerphone systems using th eADSP-2101 microprocessor with a pipeline and modified harvard architecture. We apply the LMS (least mean square) algorithm to estimate the coefficients of a transversal FIR filter. For the acustic adaptive echo canceller, we propose a parallel operation programming to imrove algorithm execution speed and apply a nonlinear quantization to reduce the quantization error caused by large dynamic range of voice signal.

• Proceedings of the KIEE Conference
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• 1995.07b
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• pp.977-979
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• 1995

MPEG-II is the international standard of compression for digital image and digital audio that is the most important in the multimedia environment. Now many researchers are developing relevant systems. MPEG-II consists of video, audio, system and the other part. In this paper, we have designed and demonstrated two channel audio encoder system that processes the audio compression part, and excutes layer II for complexity and psychoacoustic model II, with ADSP-21020 of Analog Device.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1995.10a
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• pp.728-731
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• 1995

• Journal of Biomedical Engineering Research
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• v.22 no.3
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• pp.285-291
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• 2001

In this paper, we designed two preprocessing adaptive filter - high pass filter and notch filter - using FPGA. For minimizing the calculation load of multi-channel and high-resolution ECG system, we utilize FPGA rather than digital signal processing chip. To implement the designed filters in FPGA, we utilize FPGA design tool(Altera corporation, MAX-PLUS II) and CSE database as test data. In order to evaluate the performance in terms of processing time, we compared the designed filters with the digital filters implemented by ADSP21061(Analog Devices). As a result, the filters implemented by FPGA showed better performance than the filters based on ADSP21061. As a consequence of examination, we conclude that FPGA is a useful solution in multi-channel and high-resolution signal processing.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.6
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• pp.489-497
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• 2001

The proposed dobule phase locked loop and active multiple interphase reactor are used to eliminate the circular current and the voltage ripples caused by the system parameter unbalance of parallel connected UPSs. In this paper, digital controller for the dobule PLL and active interphase reactor is implemented with ADSP21061 as an aspect of functional convenience.

• Journal of Korea Multimedia Society
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• v.3 no.3
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• pp.263-271
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• 2000

In this paper, an acoustic echo canceller(AEC) is implemented by ADSP-2181. This AEC uses a noise robust adaptive algorithm and a postprocessing method which attenuates residual echo using cross-correlation between estimated error signal and microphone input signal. We propose new postprocessing method that uses two thresholds to prevent signal distortion after postprocessing and to improve the performance of AEC without extra computational burden. Through experiments using a 16 bit fixed-point DSP board (ADSP-2181 EZ-KIT Lite board), it is shown that the noise robust adaptive algorithm performs well in the double-talk situations and the convergence speed is comparable to NLMS. Using the postprocessor, ERLE is improved about 20 dB. As a result, the AEC with a postprocessor shows better performance than conventional ones.