• Journal of Power Electronics
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• v.16 no.1
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• pp.340-350
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• 2016

A cascaded hybrid multilevel inverter including a reconfiguration technique for low voltage dc distribution applications is proposed in this paper. A PWM generation fault detection and reconfiguration paradigm after an inverter cell fault are developed by using only a single-chip controller. The proposed PWM technique is also modified to reduce switching losses. In addition, the proposed topology can reduce the number of required power switches compared to the conventional cascaded multilevel inverter. The proposed technique is validated by using a 3-kVA prototype. The switching losses of the proposed multilevel inverter are also investigated. The experimental results show that the proposed hybrid inverter can improve system efficiency, reliability and cost effectiveness. The efficiency of proposed system is 97.45% under the tested conditions. The proposed hybrid inverter topology is a promising method for low voltage dc distribution and can be applied for the multiple loads which are required in a data center or telecommunication building.

• Journal of Power Electronics
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• v.19 no.3
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• pp.676-690
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• 2019

This paper presents a switched capacitor (SC) based bidirectional dc-dc converter topology for high voltage gain applications. The proposed converter is able to operate with multiple integral voltage conversion ratios based on user input. The architecture of a user-friendly, inductor-less multi-voltage-gain bidirectional dc-dc converter is proposed in this study. The inductor-less or magnetic-less design of the proposed converter makes it effective in higher temperature applications. Furthermore, the proposed converter has a reduced component count and lower voltage stress across its switches and capacitors when compared to existing SC converters. An output impedance analysis of the proposed converter is presented and compared with popular existing SC converters. The proposed converter is simulated in the OrCAD PSpice environment and the obtained results are presented. A 200 W hardware prototype of the proposed SC converter has been developed. Experimental results are presented to validate the efficacy of the proposed converter.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.394-395
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• 2011

In order to increase the power conversion efficiency and improve the power factor, a modified forward converter is proposed, which adopts a capacitive output filter instead of the inductive output filter of the conventional forward converter. Therefore, the proposed converter has wide input voltage range in opposite to that of the conventional forward converters. Moreover, the proposed converter uses the critical conduction mode for automatic current shaping to improve the power factor. As a result, the proposed converter can achieve quasi-resonant zero-voltage-switching, which can minimize the switching loss of main MOSFET. In addition, the operational principle of the proposed converter is analyzed and the characteristic of the proposed converter is investigated in this paper. To validate the effectiveness of the proposed converter, a prototype of 13W is implemented and the experimental results are discussed in more detail.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.759-762
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• 2002

In this paper, a voltage-controlled linear variable resistor (VCLVR) using a floating-gate MOS-FET (FG-MOSFET) is proposed. The proposed-circuit is the grounded VCLVR consists of only an ordinary MOSFET and an FG-MOSFET. The advantage of the proposed VCLVR are low-voltage and wide-input range. Next, as applications, a floating-node voltage controlled variable resistor and an operational transconductance amplifier using the proposed VCLVRs are proposed. The performance of the proposed circuits are characterized through HSPICE simulations with a standard 0.6 ${\mu}$m CMOS process. simulations of the proposed VCLVR demonstrate a resistance value of 40 k$\Omega$ to 338 k$\Omega$ and a THD of less than 1.1 %.

• Journal of Electrical Engineering and Technology
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• v.11 no.3
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• pp.644-652
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• 2016

This paper presents an improved single-stage ac-dc LED-drive flyback converter using the transformer-coupled lossless (TCL) snubber. The proposed converter is derived from the integration of a full-bridge diode rectifier and a conventional flyback converter with a simple TCL snubber. The TCL snubber circuit is composed of only two diodes, a capacitor, and a transformer-coupled auxiliary winding. The TCL snubber limits the surge voltage of the switch and regenerates the energy stored in the leakage inductance of the transformer. Also, the switch of the proposed converter is turned on at a minimum voltage using a formed resonant circuit. Thus, the proposed converter achieves high efficiency. The proposed converter utilizes only one general power factor correction (PFC) control IC as its controller and performs both PFC and output power regulation, simultaneously. Therefore, the proposed converter provides a simple structure and an economic implementation and achieves a high power factor without the need for any separate PFC circuit. In this paper, the operational principle of the proposed converter is explained in detail and the design guideline of the proposed converter is briefly shown. Experimental results for a 40-W prototype are shown to validate the performance of the proposed converter.

• Journal of Electrical Engineering and Technology
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• v.6 no.5
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• pp.658-665
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• 2011

In the present paper, a novel fast peak detector for single- or three-phase unsymmetrical voltage sags is proposed. The proposed detector is modified from a single-phase digital phase-locked loop based on a d-q transformation using an all-pass filter (APF). APF generates a virtual phase with $90^{\circ}$ phase delay. However, this virtual phase cannot reflect a sudden change of the grid voltage in the moment of voltage sag, which causes a peak value to be significantly distorted and to settle down slowly. Specifically, the settling time of the peak value is too long when voltage sag occurs around a zero crossing, such as phase $0^{\circ}$ and $180^{\circ}$. This paper describes the operating principle of the APF problem and proposes a modified all-pass filter (MAPF) to mitigate the inherent APF problem. In addition, a new fast peak detector using MAPF is proposed. The proposed detector is able to calculate a peak value within 0.5 ms, even when voltage sag occurs around zero crossing. The proposed fast peak detector is compared with the conventional detector using APF. Results show that the proposed detector has faster detection time in the whole phase range. Furthermore, the proposed fast peak detector can be effectively applied to unsymmetrical three-phase voltage sags. Simulation and experimental results verify the advantages of the proposed detector and MAPF.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.53 no.1
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• pp.37-46
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• 2004

A novel rotor speed estimation method using model reference adaptive control(MRAC) is proposed to improve the performance of a sensorless vector controller. In the proposed method, the stator current is used as the model variable for estimating the speed. In conventional MRAC methods, the relation between the two model errors and the speed estimation error is unclear. In the proposed method, the stator current error is represented as a function of the first degree for the error value in the speed estimation. Therefore, the proposed method can produce a fast speed estimation. The robustness of the rotor flux-based MRAC, back EMF-based MRAC, and proposed MRAC is compared based on a sensitivity function about each error of stator resistance, rotor time constant, mutual inductance. Consequently, the proposed method is much more robust than the conventional methods as regards errors in the mutual inductance, stator resistance. Therefore, the proposed method offers a considerable improvement in the performance of a sensorless vector controller at a low speed. In addition, the superiority of the proposed method and the validity of sensitivity functions were verified by simulation and experiment.

• Journal of applied mathematics & informatics
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• v.30 no.3_4
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• pp.571-591
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• 2012

To the best of our knowledge, there is no method, in the literature, to find the fuzzy optimal solution of fully fuzzy shortest path (FFSP) problems i.e., shortest path (SP) problems in which all the parameters are represented by fuzzy numbers. In this paper, a new method is proposed to find the fuzzy optimal solution of FFSP problems. Kumar and Kaur [Methods for solving unbalanced fuzzy transportation problems, Operational Research-An International Journal, 2010 (DOI 10.1007/s 12351-010-0101-3)] proposed a new method with new representation, named as JMD representation, of trapezoidal fuzzy numbers for solving fully fuzzy transportation problems and shown that it is better to solve fully fuzzy transportation problems by using proposed method with JMD representation as compare to proposed method with the existing representation. On the same direction in this paper a new method is proposed to find the solution of FFSP problems and it is shown that it is also better to solve FFSP problems with JMD representation as compare to existing representation. To show the advantages of proposed method with this representation over proposed method with other existing representations. A FFSP problem solved by using proposed method with JMD representation as well as proposed method with other existing representations and the obtained results are compared.

• ETRI Journal
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• v.38 no.3
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• pp.425-434
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• 2016

A novel average magnitude difference function (AMDF)-based pitch detection scheme (PDS) is proposed to achieve better performance in speech quality. A performance evaluation of the proposed PDS is carried out through both a simulation and a real-time implementation of a speech analysis-synthesis system. The parameters used to compare the performance of the proposed PDS with that of PDSs that are based on either a cepstrum, an autocorrelation function (ACF), an AMDF, or circular AMDF (CAMDF) methods are as follows: percentage gross pitch error (%GPE); a subjective listening test; an objective speech quality assessment; a speech intelligibility test; a synthesized speech waveform; computation time; and memory consumption. The proposed PDS results in lower %GPE and better synthesized speech quality and intelligibility for different speech signals as compared to the cepstrum-, ACF-, AMDF-, and CAMDF-based PDSs. The computational time of the proposed PDS is also less than that for the cepstrum-, ACF-, and CAMDF-based PDSs. Moreover, the total memory consumed by the proposed PDS is less than that for the ACF- and cepstrum-based PDSs.

• Journal of Institute of Control, Robotics and Systems
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• v.9 no.9
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• pp.692-699
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• 2003

A novel rotor speed estimation method using Model Reference Adaptive Control(MRAC) is proposed to improve the performance of a sensorless vector controller. In the proposed mettled, the stator current is used as the model variable for estimating the speed. In conventional MRAC methods, the relation between the two model errors and the speed estmation error is unclear. Yet, in the proposed method, the stator current error is represented as a function of the first degree for the error value in the speed estimation. Therefore, the proposed method can produce a fast speed estimation and is robust to the parameters error In addition, the proposed method of offers a considerable improvement in the performance of a sensorless vector controller at a low speed. The superiority of the proposed method is verified by simulation and experiment in a low speed region and at a zero-speed.