• Title/Summary/Keyword: 8.2MHz

Search Result 1,179, Processing Time 0.026 seconds

Adjacent Interference Analysis between M-WiMAX OFDMA/TDD and WCDMA FDD System in the 2.6 GHz Band Part I : Adjacent Interference Analysis in SISO System (2.6 GHz 대역에서 M-WiMAX OFDMA/TDD 시스템과 WCDMA FDD 시스템간의 상호 간섭 분석 Part I : SISO 시스템에서의 상호 간섭 분석)

  • Ko, Sang-Jun;Wang, Yu-Peng;Chang, Kyung-Hi
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.32 no.6A
    • /
    • pp.573-587
    • /
    • 2007
  • In this paper, we analyze the adjacent interference between WCDMA and M-WiMAX systems in the 2.6GHz Band under the SISO (Single Input Single Output) configuration. The interference scenarios are characterized into 8 scenarios with different victim and interfering links. Among the 8 scenarios, we find that the most performance loss is observed in the scenarios of victim uplink suffering interference from downlink in both systems. Besides, guard band is applied to mitigate the adjacent interference in all the scenarios. Especially, we reveal that M-WiMAX system is much more sensitive to adjacent interference than WCDMA system due to the lower transmission power. In this paper, we consider the worst interference environment, where interferers always transmit with the maximum power, a loose spectrum mask is adapted, and no additional channel fitters are equipped in both systems.

Analog-to-Digital Converter using Pipelined Comparator Array (파이프라인드식 비교기 배열을 이용한 아날로그 디지털 변환기)

  • Son, Ju-Ho;Jo, Seong-Ik;Kim, Dong-Yong
    • Journal of the Institute of Electronics Engineers of Korea SC
    • /
    • v.37 no.2
    • /
    • pp.37-42
    • /
    • 2000
  • In this paper, The high-speed, low-Power analog-to-digital conversion structure is proposed using the pipelined comparator away for high-speed conversion rate and the successive- approximation structure for low-power consumption. This structure is the successive-approximation structure using pipelined comparator array to change the reference voltage during the holding time. An 8-bit 10MS/s analog-to-digital converter is designed using 0.8${\mu}{\textrm}{m}$ CMOS technology. The INL/DNL errors are $\pm$0.5/$\pm$1, respectively. The SNR is 41㏈ at a sampling rate of 10MHz with 100KHz sine input signal. The Power consumption is 4.14㎽ at 10MS/s.

  • PDF

A Low Power ROM using Charge Recycling and Charge Sharing (전하 재활용과 전하 공유를 이용한 저전력 롬)

  • 양병도;김이섭
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.40 no.7
    • /
    • pp.532-541
    • /
    • 2003
  • In a memory, most power is dissipated in high capacitive lines such as predecoder lines, word lines, and bit lines. To reduce the power dissipation in these high capacitive lines, this paper proposes three techniques using charge recycling and charge sharing. One is the charge recycling predecoder (CRPD). The second one is the charge recycling word line decoder (CRWD). The last one is the charge sharing bit line (CSBL) for a ROM. The CRPD and the CRWD recycle the previously used charge in predecoder lines and word lines. Theoretically, the power consumption in predecoder lines and word lines are reduced to a half. The CSBL reduces the swing voltage in the ROM bit lines to very small voltage using a charge sharing technique. the CSBL can significantly reduce the power dissipation in ROM bit lines. The CRPD, the CRWD, and the CSBL consume 82%, 72%, and 64% of the power of previous ROM designs respectively. A charge recycling and charge sharing ROM (CRCS-ROM) with the CRPD, the CRWD, and the CSBL is implemented. A CRCS-ROM with 8K16bits was fabricated in a 0.3${\mu}{\textrm}{m}$ CMOS process. The CRCS-ROM consumes 8.63㎽ at 100MHz with 3.3V. The chip core area is 0.1 $\textrm{mm}^2$.

Development of Large-area Plasma Sources for Solar Cell and Display Panel Device Manufacturing

  • Seo, Sang-Hun;Lee, Yun-Seong;Jang, Hong-Yeong
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2011.08a
    • /
    • pp.148-148
    • /
    • 2011
  • Recently, there have been many research activities to develop the large-area plasma source, which is able to generate the high-density plasma with relatively good uniformity, for the plasma processing in the thin-film solar cell and display panel industries. The large-area CCP sources have been applied to the PECVD process as well as the etching. Especially, the PECVD processes for the depositions of various films such as a-Si:H, ${\mu}c$-Si:H, Si3N4, and SiO2 take a significant portion of processes. In order to achieve higher deposition rate (DR), good uniformity in large-area reactor, and good film quality (low defect density, high film strength, etc.), the application of VHF (>40 MHz) CCP is indispensible. However, the electromagnetic wave effect in the VHF CCP becomes an issue to resolve for the achievement of good uniformity of plasma and film. Here, we propose a new electrode as part of a method to resolve the standing wave effect in the large-area VHF CCP. The electrode is split up a series of strip-type electrodes and the strip-type electrodes and the ground ones are arranged by turns. The standing wave effect in the longitudinal direction of the strip-type electrode is reduced by using the multi-feeding method of VHF power and the uniformity in the transverse direction of the electrodes is achieved by controlling the gas flow and the gap length between the powered electrodes and the substrate. Also, we provide the process results for the growths of the a-Si:H and the ${\mu}c$-Si:H films. The high DR (2.4 nm/s for a-Si:H film and 1.5 nm/s for the ${\mu}c$-Si:H film), the controllable crystallinity (~70%) for the ${\mu}c$-Si:H film, and the relatively good uniformity (1% for a-Si:H film and 7% for the ${\mu}c$-Si:H film) can be obtained at the high frequency of 40 MHz in the large-area discharge (280 mm${\times}$540 mm). Finally, we will discuss the issues in expanding the multi-electrode to the 8G class large-area plasma processing (2.2 m${\times}$2.4 m) and in improving the process efficiency.

  • PDF

CMOS Linear Power Amplifier with Envelope Tracking Operation (Invited Paper)

  • Park, Byungjoon;Kim, Jooseung;Cho, Yunsung;Jin, Sangsu;Kang, Daehyun;Kim, Bumman
    • Journal of electromagnetic engineering and science
    • /
    • v.14 no.1
    • /
    • pp.1-8
    • /
    • 2014
  • A differential-cascode CMOS power amplifier (PA) with a supply modulator for envelope tracking (ET) has been implemented by 0.18 ${\mu}m$ RF CMOS technology. The loss at the output is minimized by implementing the output transformer on a FR-4 printed circuit board (PCB). The CMOS PA utilizes the $2^{nd}$ harmonic short at the input to enhance the linearity. The measurement was done by the 10MHz bandwidth 16QAM 6.88 dB peak-to-average power ratio long-term evolution (LTE) signal at 1.85 GHz. The ET operation of the CMOS PA with the supply modulator enhances the power-added efficiency (PAE) by 2.5, to 10% over the stand-alone CMOS PA for the LTE signal. The ET PA achieves a PAE of 36.5% and an $ACLR_{E-UTRA}$ of -32.7 dBc at an average output power of 27 dBm.

The Optimum Structure Design of 1005 RF Chip Inductors for GHz Band (GHz 대역을 위한 1005 RF 칩 인덕터의 최적 구조 설계)

  • Kim, Jae-Wook;Ryu, Chang-Keun
    • Proceedings of the IEEK Conference
    • /
    • 2005.11a
    • /
    • pp.785-788
    • /
    • 2005
  • In this study, micro-scale, high-performance, solenoid-type RF chip inductors were investigated. The size of the RF chip inductors fabricated in this work was $1.0{\times}0.5{\times}0.5mm^3$ The material and shape of the core were 96% $Al_2O_3$ and I-type. The material and number of turn of coil were copper (Cu) and 6. The diameter ($40{\mu}m$) of coil and length (0.35mm) of solenoid were determined by a Maxwell three-dimensional field simulator to maximize the performance of the inductors. High frequency characteristics of the inductance (L) and quality-factor (Q) of developed inductors were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). The inductors developed have inductances of 10.8nH and quality factors of 25.2 at 250MHz, and show results comparable to those measured for the inductors prepared by CoilCraftTm that is one of the best chip inductor company in the world. The simulated data predicted the high-frequency data of the Land Q of the inductors developed well.

  • PDF

MEMS-BASED MICRO FLUXGATE SENSOR USING SOLENOID EXCITATION AND PICK-UP COILS (MEMS 공정 제작방법에 의한 솔레노이드형 여자 코일과 검출코일을 사용한 마이크로 플럭스게이트 센서)

  • 나경원;박해석;심동식;최원열;황준식;최상인
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2002.07a
    • /
    • pp.172-176
    • /
    • 2002
  • This paper describes a MEMS-based micro-fluxgate magnetic sensing element using Ni$\_$0.8/Fe$\_$0.2/ film formed by electroplating. The micro-fluxgate magnetic sensor composed of a thin film magnetic core and micro-structured solenoids for the pick-up and the excitation coils, is developed by using MEMS technologies in order to take advantage of low-cost, small size and lower power consumption in the fabrication. A copper with 20um width and 3um thickness is electroplated on Cr(300${\AA}$)/Au(1500${\AA}$) films for the pick-up(42turn) and the excitation(24turn) coils. In order to improve the sensitivity of the sensing element, we designed the magnetic core into a rectangular-ring shape to reduce the magnetic flux leakage. An electroplated permalloy film with the thickness of 3 $\mu\textrm{m}$ is obtained under 2000Gauss to induce magnetic anisotropy. The magnetic core has the high DC effective permeability of ∼1,100 and coercive field of -0.1Oe. The fabricated sensing element using rectangular-ring shaped magnetic film has the sensitivity of about 150V/T at the excitation frequency of 2MHz and the excitation voltage of 4.4Vp-p. The power consumption is estimated to be 50mW.

  • PDF

A Study for Optimum Design and Fabrication of Microscale Solenoid RF Chip Inductors (극소형 솔레노이드 RF 칩 인덕터의 설계 및 제작에 대한 연구)

  • 윤의중;정영창
    • The Transactions of the Korean Institute of Electrical Engineers C
    • /
    • v.52 no.11
    • /
    • pp.501-507
    • /
    • 2003
  • In this study, microscale, high-performance, solenoid-type RF chip inductors were investigated. The size of the RF chip inductors fabricated in this work was 1.0${\times}$0.5${\times}$0.5㎣. 96% $Al_2$ $O_3$and I-type were used as the material and shape of the core, respectively. The copper (Cu) wire with 6 turns was employed as the coils. The diameter (40${\mu}{\textrm}{m}$) and position (middle) of the coil and the length (0.35mm) of solenoid were determined by a high-frequency structure simulator (HFSS) to maximize the performance of the inductors. High frequency characteristics of the inductance (L) and quality-factor (Q) of developed inductors were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). The inductors developed have inductances of 10.8nH and quality factors of 25.2 to 50 over the frequency ranges of 250MHz to l GHz, and show results comparable to those measured for the inductors prepared by CoilCraf $t^{Tm}$ . The simulated data predicted the high-frequency data of the L and Q of the inductors developed well.l.

Preparation and PTC properties of thin films $BaTiO_3$ ceramic system using RF/DC magnetron sputtering method (RF/DC 마그네트론 스퍼터법을 이용한 $BaTiO_3$계 세라믹 박막의 제조와 PTC특성)

  • 박춘배;송민종;김태완;강도열
    • Electrical & Electronic Materials
    • /
    • v.8 no.1
    • /
    • pp.77-82
    • /
    • 1995
  • PTCR(Positive Temperature Coefficient of Resistivity) thermistor in thin film BaTiO$_{3}$ system was prepared by using radio frequency(13.56 MHz) and DC magnetron sputter equipment. Polycrystalline, surface structure, and R-T(Resistivity-Temperature) characteristics of the specimens were measured by X-ray diffraction(D-Max3, Rigaku, Japan), SEM(Scanning Electron Microscopy: M.JSM84 01, Japan), and insulation resistance measuring system (Keithley 719), respectively. Thin films characteristics of the thermistor showed different properties depending on the substrate even with the same sputtering condition. The thin film formed on the A1$_{2}$O$_{3}$ substrate showed a good crystalline and a low resistivity at below curie point. However, the thin films prepared on slide glass and Si wafer were amorphous. The thicknesses of the three samples prepared under the same process conditions were 700[.angs.], 637.75[.angs.], and 715[.angs.], respectively.

  • PDF

A High-Linearity Low-Noise Reconfiguration-Based Programmable Gain Amplifier

  • Han, Seok-Kyun;Nguyen, Huy-Hieu;Lee, Sang-Gug
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.13 no.4
    • /
    • pp.318-330
    • /
    • 2013
  • This paper presents a high-linearity low-noise small-size programmable gain amplifier (PGA) based on a new low-noise low-distortion differential amplifier and a proposed reconfiguration technique. The proposed differential amplifier combines an inverter-based differential pair with an adaptive biasing circuit to reduce noise and distortion. The reconfiguration technique saves the chip size by half by utilizing the same differential pair for the input transconductance and load-stage, interchangeably. Fabricated in $0.18-{\mu}m$ CMOS, the proposed PGA shows a dB-linear control range of 21dB in 16 steps from -11 dB to 10 dB with a gain error of less than ${\pm}0.33$ dB, an IIP3 of 7.4~14.5 dBm, a P1dB of -7~1.2 dBm, a noise figure of 13dB, and a 3-dB bandwidth of 270MHz at the maximum gain, respectively. The PGA occupies a chip area of $0.04mm^2$ and consumes only 1.3 mA from the 1.8 V supply.