• Proceedings of the IEEK Conference
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• 2009.05a
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• pp.225-227
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• 2009

International standard specification, H.264/SVC improved from H.264/AVC, is set up so as to promote free use of huge multimedia data in various channel environments.;H.264/AVC is a international standard speicification for video compression, adopted and commercialized as standard for DMB broadcasting by JVT of ISO/IEC MPEG and ITU-T VCEG. SVC standard uses 'intra/inter prediction' in AVC as well as 'inter-layer intra prediction', 'inter-layer motion prediction' and 'inter-layer residual prediction' to improve efficiency of encoding. Among prediction technologies, 'inter-layer intra prediction' is to use co-located block of up sampled sublevels as a prediction signal. At this time, application of interpolation is one of the most important factors to determine encoding efficiency. SVC's currently using poly-phase FIR filter of 4-tap and 2-tap respectively to luma components. This paper is written for the purpose of analyzing encoding performance according to the interpolation. For this purpose, we applied poly-phase FIR filter of '2-tap', '4-tap' and '6-tap' respectively to luma components and then measured bit-rate, PNSR and running time of interpolation filter. We're expecting that the analysis results of this paper will be utilized for effective application of interpolation filter. SVC standard uses 'intra/inter prediction' in AVC as well as 'inter-layer intra prediction', 'inter-layer motion prediction' and 'inter-layer residual prediction' to improve efficiency of encoding.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.11a
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• pp.200-203
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• 2011

In order to convert interlaced video into progressive scanning format, this paper proposed a high performance de-interlacing algorithm based on region adaptive interpolation filter design. Specifically, usage of the 6-tap filter is only for the most complex region, but for the smooth and regular edge region, much more correlated filter such as 2-tap or 4-tap filter should be used instead. According to the experimental results, the proposed algorithm has achieved noticeably good performance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.6A
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• pp.464-472
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• 2012

In this paper, we propose a new super-resolution algorithm that uses successive frames by applying the block matching motion estimation algorithm. Usually, single frame super-resolution algorithms are based on probability or discrete wavelet transform (DWT) approach to extract high-frequency components of the input image, but only limited information is available for these algorithms. To solve this problem, various multiple-frame based super-resolution algorithms are proposed. The accuracy of registration between frames is a very important factor for the good performance of an algorithm. We therefore propose an algorithm using 6-Tap FIR filter to increase the accuracy of the image registration with sub-pixel unit. Proposed algorithm shows better performance than other conventional interpolation based algorithms such as nearest neighborhood, bi-linear and bi-cubic methods and results in about the same image quality as DWT based super-resolution algorithm.

• Proceedings of the IEEK Conference
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• summer
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• pp.199-203
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• 2004

In this paper, we only describe the digital block of two-channel 18-bit analog-to-digital (A/D) converter employing sigma-delta method and xl28 decimation. The device contains two fourth comb filters with 1-bit input from sigma­delta modulator. each followed by a digital half band FIR(Finite Impulse Response) filters. The external analog sigma-delta modulators are sampled at 6.144MHz and the digital words are output at 48kHz. The fourth-order comb filter has designed 3 types of ways for optimal power consumption and signal-to-noise ratio. The following 3 digital filters are designed with 12tap, 22tap and 116tap to meet the specification. These filters eliminate images of the base band audio signal that exist at multiples of the input sample rate. We also designed these filters with 8bit and 16bit filter coefficient to analysis signal-to-noise ratio and hardware complexity. It also included digital output interface block for I2S serial data protocol, test circuit and internal input vector generator. It is fabricated with 0.35um HYNIX standard CMOS cell library with 3.3V supply voltage and the chip size is 2000um by 2000um. The function and the performance have been verified using Verilog XL logic simulator and Matlab tool.

• Journal of Broadcast Engineering
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• v.17 no.3
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• pp.480-490
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• 2012

When interpolating chrominance signal, the H.264/AVC standard uses linear interpolation. In this paper, we suggest more effective method that uses a high precision filter, 6-tap FIR filter, 2-tap linear filter for chroma interpolation. The experimental result shows that the proposed method achieves the BD-Rate decrease without the PSNR decrease compared with Jm11.0kta2.7. The maximum BD-rate improvements on Y component are 1.3%, those of Cb and Cr components are 19.8%, 25.0%, respectively. The average BD-rate improvements on Y component are 0.5%, those of Cb and Cr components are 6.1%, 6.9%, respectively.

• Journal of information and communication convergence engineering
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• v.11 no.2
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• pp.118-123
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• 2013

This paper proposes an efficient hardware architecture for high efficiency video coding (HEVC), which is the next generation video compression standard. It adopts several new coding techniques to reduce the bit rate by about 50% compared with the previous one. Unlike the previous H.264/AVC 6-tap interpolation filter, in HEVC, a one-dimensional seven-tap and eight-tap filter is adopted for luma interpolation, but it also increases the complexity and gate area in hardware implementation. In this paper, we propose a parallel architecture to boost the interpolation performance, achieving a luma $4{\times}4$ block interpolation in 2-4 cycles. The proposed architecture contains shared operations reducing the gate count increased due to the parallel architecture. This makes the area efficiency better than the previous design, in the best case, with the performance improved by about 75.15%. It is synthesized with the MagnaChip $0.18{\mu}m$ library and can reach the maximum frequency of 200 MHz.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.11a
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• pp.106-109
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• 2011

본 논문에서는 연속된 프레임을 갖는 영상의 프레임간 움직임 추정 기법을 응용하여 고해상도 영상을 획득하는 초고 해상도 기법을 제안한다. 기존의 단일 영상을 이용한 초고해상도 기법의 경우 영상에서의 고주파 대역을 찾기 위해 확률 기반의 다양한 방법이 제시되었으나 연산에 사용할 수 있는 정보가 제한적이라는 문제가 존재한다. 이러한 문제를 해결하기 위해 연속된 프레임을 이용한 다양한 초고해상도 기법이 제안되었다. 본 논문에서는 주어진 영상의 전, 후의 다수 프레임을 정하여 6-tap FIR(finite impulse response) 필터를 이용하여 프레임들의 부화소(sub-pixel)를 구한 뒤에, 부화소 정밀도의 움직임 추정을 통하여 보다 정확한 고주파성분을 복원하고자 한다. 실험을 통하여 제안하는 기법이 기존의 고등차수(bi-cubic)보간법 보다 선명한 영상을 획득할 수 있었다.

• KIEE International Transactions on Electrophysics and Applications
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• v.4C no.6
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• pp.300-305
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• 2004

In this paper, new design equations based on the pole-zero analysis for multi-layered interdigital stripline linear group delay bandpass filter with tap input ports are presented. As a design example, a four-pole group delay filter with center frequency of 2.14GHz, bandwidth of 160MHz, and group delay variation of $\pm$0.1nS for LTCC technology or multilayered PCB technology is designed. In the design process, it is not necessary to simulate the entire structure, as the simulation of half structures is sufficient. Good results can be attained after the optimizing process was performed three times using the proposed equations and a commercial EM simulator.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.2
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• pp.274-279
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• 2009

H.264 suggests applying a 2-D 6-tap wiener filter to realize the interpolation for half-pixel positions, followed by a bilinear interpolation to get the data of quarter-pixels precision. This method is comparatively simpler; however, it only considers the affection of 4-connection neighborhood ignoring the influence that comes from the changing rate between respective neighborhoods. As a result, it has the characteristics of a Low-pass filter under the risk of losing high-frequency weights. The Cubic interpolation uses the gray-values within the larger regions of points to be sampled for interpolation. Nevertheless, the cubic interpolation is more complicated and computational. We give a deep analysis on the features while applying both bilinear and cubic interpolation in H.264 presenting a proper selection of interpolation algorithm with respect to specific distribution of gray-value in a certain grand block. The experiments point out that load far motion searching and interpolation are reduced when promoting the precision of interpolation simultaneously.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.12
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• pp.150-159
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• 2014

The latest video coding standard, HEVC can improve the coding efficiency significantly compared with the H.264/AVC. However the HEVC encoder requires much larger computational complexities. The longer 8-tap interpolation filter of the HEVC which is used in a non-integer motion estimation is one of the reasons and this paper aims to reduce the computational complexities. First of all, three shorter-tap interpolation filters for a motion estimation process are tested rather than the use of a standard interpolation filter. In addition, the fast searching strategies to reduce the number of comparisons for choosing the best non-integer motion vector are proposed. Finally, the interpolation process is selectively applied according to the searching strategy. By combining all of the techniques, the experimental results show that the encoding times can be reduced by 13.6%, 18.5% and 21.1% with the coding efficiency penalties of 0.7%, 1.5% and 2.5%, respectively. For the full-HD video sequences, the coding efficiency penalties are reduced to 0.4%, 1.1% and 1.6% at the same level of the encoding time savings, which shows the effectiveness of the proposed schemes for the high resolution video sequences.