• 한국가축번식학회지
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• 제20권4호
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• pp.459-465
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• 1997

본 연구는 핵이식의 시기가 융합과 체외발달에 미치는 영향을 조사하고 체외수정 공핵배의 핵과 체외성숙난자간에 전기융합의 최적 통전전압과 통전시간을 결정하기 위하여 시도하였다. 수핵난자는 체외성숙후 25~27시간에 제핵하였고 난자의 추가성숙을 위하여 융합전에 18~20시간 더 배양하였다. 공핵체외수정란은 16~32세포기까지 BOEC와 공배양하였다. 공핵배의 할구 이식시간은 조기핵이식구에서는 체핵후 1~3시간, 자연핵이식구를 체핵후 16~18시간이었다. 융합은 체외성숙후 43~45시간에 행하였다. 융합율은 할구 이식시기에 따라 차이가 없었으나 난할율과 8~16세포기 발달은 자연핵이식구에서 높았다. 융합, 난할 및 상실배 배반포 발달율은 1.0kV/cm보다 0.75kV/cm전압에서 높았으며 0.7kV/cm에서 상실배 배반포율은 17.6%였다. 통전시간에 따라 융합율은 차이가 없었으나 50$\mu$sec와 70$\mu$sec에서 난할율과 상실배-배반포 발달율이 다소 높았다. 본 결과에서 핵이식의 최적시기는 수핵난자의 체외성숙후 42~44시간이었으며 최적 전기융합 조건은 50~70$\mu$sec의 1회 0.75kV/cm임을 알 수 있었다.

• Journal of Power Electronics
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• 제13권5호
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• pp.779-786
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• 2013

A highly efficient sustaining driver is proposed for plasma display panels (PDPs). When the PDP is charged and discharged, the proposed sustaining driver employs an address voltage source used in an addressing period. A voltage source is used for fully charging the panel to the sustaining voltage, and an initial inductor current helps the panel discharge to 0 V. The resonance between the panel and an inductor is made by shifting the voltage and current bias level when charging and discharging the panel. As a result, the proposed circuit can reduce power consumption, switching loss, heat dissipation, and production cost. Experimental results of a 42-inch PDP are provided to verify the operation and features of the proposed circuit.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 B
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• pp.1126-1128
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• 2001

A single-stage high-power-factor electron ic ballast operating in critical conduction mode is presented in this paper. The proposed topology is based on integration of a boost-like converter and a LCC Type half-bridge serial resonant inverter. The power-factor-correction(PFC) stage is a boost-like converter operating in critical conduction mode for positive and negative half cycle voltage respectively at line frequency (60Hz) so that a high power factor is achieved naturally. The simulated and experimental results for 100w fluorescent lamps operating at 42kHz switching frequency and 220V line voltage have been obtained.

• 한국세라믹학회지
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• 제42권1호
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• pp.28-32
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• 2005

이중 이온빔 스퍼터링(Dual ion-Beam Sputtering, DIBS)과 단일 이온빔 스피터링(Single ion-Beam Sputtering, SIBS)을 사용하여 기판의 온도와 보조 이온빔 에너지 변화에 따라 $Ta_{2}O_{5}$ 박막의 광학적 특성과 박막에 존재하는 응력의 변화에 과해 관찰하였다. SIBS 방법에 의해 증착되어진 박막의 굴절률은 150^{circ}C$에서 최고 2.144를 나타내었으며, $150^{circ}C$ 이상에서는 감소하였다. DIBS 방법에 의해 증착된 732린 박막은 기판의 온도가 증가함에 따라 $200^{circ}C$에서 최고 2.117의 굴절률을 나타내었다. $100^{circ}C$ 미만의 저온 DIBS 증착은 박막에 존재하는 응력을 낮추었으나 100^{circ}C 이상의 고온 증착시에는 박막에 존재하는 응력이 켰다. 보조 이온빔 어시스트 한 경우, 보조 이온빔 에너지가 250V에서 350V로 증가함에 따라 증착된 T놀달 박막의 굴절률은 2.185로 증가하였으나, $350\~650V$인 구간에서는 굴절률이 감소하는 경향을 나타냈다. 또한, 보조 이온빔 에너지가 증가함으로써 박막에 존재하는 응력이 감소하여 650 V에서 0.1834 GPa를 나타내었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.415-418
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• 2001

The I-V characteristics and its stability of ZPCCL-based ceramic varistors doped with La$_2$O$_3$in the range of 0.0~4.0 mol% were investigated. The density of ceramics was increased in the range of 4.7~5.8 g/cm$^3$ with increasing La$_2$O$_3$content. As La$_2$O$_3$content is increased, the varistor voltage was decreased in the range of 503.49-9.42 V/mm up to 2.0 mol%, whereas increasing La$_2$O$_3$content further caused it to increase. The ZPCCL-based varistors were characterized by nonlinearity, in which the nonlinear exponent is in the range of 3.05~82.43 and leakage current is in the range of 0.24-100.22 $\mu$A. Among ZPCCL-based varistors, 0.5 mol% added-varistors exhibited an excellent nonlinearity, in which the nonlinear exponent is 82.43 and the leakage current is 0.24 $\mu$A. Furthermore, they exhibited a high stability, in which the variation rate of the varistor voltage and the nonlinear exponent was -1.11% and -6.72%, respectively, under DC stress, such as (0.80 V$_{1mA}$9$0^{\circ}C$/12h)+(0.85 V$_{1mA}$115$^{\circ}C$//12h) +(0.90 V$_{1mA}$12$0^{\circ}C$//12h)+(0.95 V$_{1mA}$1$25^{\circ}C$//12h)+(0.95 V$_{1mA}$15$0^{\circ}C$//12h). Consequently, it was estimated that ZPCCL-based ceramics will be applied to development of Pr$_{6}$O$_{11}$ based ZnO varistors having a high performance.e.rformance.e.

• 한국산학기술학회논문지
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• 제16권9호
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• pp.6247-6253
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• 2015

본 논문은 병렬 오차 증폭기 구조를 적용하여 과도응답특성 개선한 LDO 레귤레이터를 제안한다. 제안하는 LDO 레귤레이터는 고 이득, 좁은 주파수 대역의 오차증폭기 (E/A1)와, 저 이득, 넓은 주파수 대역의 오차증폭기 (E/A2)로 이루어지며, 두 오차증폭기를 병렬 구조로 설계해서 과도응답특성을 개선한다. 또한 슬루율을 높여주는 회로를 추가하여 회로의 과도응답특성을 개선하였다. 극점 불할 기법을 사용하여 외부 보상 커패시터를 온 칩 화하여 IC 칩 면적을 줄여 휴대기기 응용에 있어서도 적합하게 설계 하였다. 제안된 LDO 레귤레이터는 매그나칩/하이닉스 $0.18{\mu}m$ CMOS 공정을 사용하여 회로설계 하였고 칩은 $500{\mu}m{\times}150{\mu}m$ 크기로 레이아웃을 실시하였다. 모의실험을 한 결과, 2.7 V ~ 3.3 V의 입력 전압을 받아서 2.5 V의 전압을 출력하고 최대 100 mA의 부하 전류를 출력한다. 레귤레이션 특성은 100 mA ~ 0 mA에서 26.1 mV의 전압변동과 510 ns의 정착시간을 확인하였으며, 0 mA에서 100 mA의 부하 변동 시 42.8 mV의 전압 변동과 408 ns의 정착 시간을 확인하였다.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제54권12호
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• pp.601-608
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• 2005

This paper presents a novel single-stage high-power-factor electronic ballast for fluorescent lamps operating in critical conduction mode. The proposed topology is based on integration of boost converter as power factor corrector(PFC) and a half-bridge high frequency parallel resonant inverter into a single stage. The input stage of the boost converter is operating in critical conduction mode for positive and negative half cycle voltage respectively at line frequency(60Hz). So that a boost converter makes the line current follow naturally the sinusoidal line voltage waveform. The simulated and experimental results for 100W fluorescent lamps operating at 42kHz switching frequency and 220V line voltage have been obtained. This proposed inverter will be able to be practically used as a power supply in various fields as induction heating applications, fluorescent lamp and DC-DC converter etc.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.42-45
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• 2009

We report simple structure red phosphorescent devices comprising only single organic layer structure. Maximum current efficiency of 9.44 cd/A and the driving voltage of 5.4 V are obtained in this single layer structure PHOLEDs, respectively. The mixed host system using electron transporting and hole transporting materials doped with $Ir(piq)_3$ provides such high efficiency and reasonable driving voltage. The principal to simplification is the direct charges injection from the metallic electrodes into mixed host materials.

• Transactions on Electrical and Electronic Materials
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• 제13권4호
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• pp.212-214
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• 2012

Both the electrically positive and negative particles in a cell of quick response-liquid powder display (QR-LPD) are surrounded by conductive electrodes on the upper and lower substrate and the dielectric materials of the barrier ribs. Particles in a cell are attached to or detached from the other materials by image force, electric field, Coulomb's force, and Van der Waals' force. Through these forces, the moving particles form an image but induce clumping phenomena. Particles having a large kinetic energy by a large q/m value crash into the opposite electrode with high speed at a large driving voltage and quickly lose electrically charged material. As a result, these particles are clumped and degrade panel performance. The clumped particles in a cell are observed by microscopic photographs and ascertained by a response time. When the bias voltage is increased to 0.68-0.76 $V/{\mu}m$, particle clumping occurs abruptly and the response time increases sharply. This particle clumping is similarly observed after the number of driving times at the driving voltage (0.42-0.64 $V/{\mu}m$).

• Journal of Electrical Engineering and Technology
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• 제3권1호
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• pp.36-42
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• 2008

In a gas insulated substation (GIS), Very Fast Transient Over-voltages (VFTOs) are generated due to switching operations and ground faults. These fast transients are associated with high frequency components of the order of a few hundreds of MHz. These transients may cause internal faults i.e., layer-to-layer faults or minor faults in a capacitively graded bushing, which is one of the important pieces of terminal equipment for GIS. In the present study, the PSPICE model has been developed to calculate the voltage distribution across the layers of 420kV graded bushing for high frequency pulses of rise time 1 to 50ns, which simulate the VFTO. For this simulation, an equivalent electrical network of bushing with different equivalent layers has been considered. The effect of different equivalent layers modeling circuits on the non-uniform voltage factor has been analysed. The influence of copper strip inductance on voltage distribution across layers has also been analysed for various rise times of high frequency transients. Finally, the leakage current of the bushing is calculated for evaluating the bushing condition under these transients.