• 전력전자학회논문지
• /
• 제22권4호
• /
• pp.369-372
• /
• 2017

This paper presents a control scheme for three-level NPC inverters using small DC-link capacitors. To reduce the inverter system volume, the film capacitor with small capacitance is a promising candidate for the DC-link. When small capacitors are applied in a three level inverter, however, the AC ripple component increases in the DC-link NPV (neutral point voltage). In addition, the three-phase input grid currents are distorted when the DC-link capacitors are fed by diode rectifier. In this paper, the additional circuit is applied to compensate for small capacitor systems defect, and the offset voltage injection method is presented for the stabilization in NPV. These two proposed processes evidently ensure the quality improvement of the input grid currents and output load currents. The feasibility of the proposed method is verified by experimental results.

• Journal of Power Electronics
• /
• 제19권4호
• /
• pp.907-921
• /
• 2019

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2006년도 전력전자학술대회 논문집
• /
• pp.128-130
• /
• 2006

We introduce 2[MVA] 3300[V] 7-level voltage source inverter system developed by POSCON and describe the main characteristics of inverter system i.e. PWM converter, H-bridge power module, phase shifted carrier PWM The PWM converter is a three-phase boost converter, which operates in a 4-quadrant and in a nearly unit displacement power factor. Experimental waveforms are also presented to verify the proposed method and performance of the developed system.

• 전력전자학회논문지
• /
• 제27권4호
• /
• pp.291-296
• /
• 2022

Capacitor is one of the reliability-critical components in power converters. The lifetime of the capacitor decreases as the operating temperature increases, and power losses caused by capacitor current are the main cause of the capacitor temperature increase. Therefore, various studies are being conducted to improve the lifetime of the capacitor by reducing the current of DC-link capacitors. In this study, pulse width modulation methods proposed for improving the lifetime of DC-link capacitors of the three-level NPC inverter are comparatively analyzed. The lifetime evaluation of the DC-link capacitor under different modulation methods is performed at component level first and then system level by considering all capacitors by applying Monte Carlo simulation. Furthermore, their effects on the efficiency and THD of the output current are also considered.

• 전력전자학회논문지
• /
• 제9권4호
• /
• pp.334-340
• /
• 2004

본 논문에서는 캐스케이드 변압기를 이용하는 멀티레벨 인버터의 변압기 크기를 동일화시키기 위한 효과적인 스위칭 패턴을 제안한다. 제안된 스위칭 방식은 기존의 SHEPWM 스위칭 방식을 기초로 하여 각 변압기에 인가되는 최대 자속을 동일하게 함으로서 캐스케이드 변압기의 위치에 상관없이 동일한 설계가 가능하다. 따라서 동일한 풀-브리지 모듈의 이용이 가능하고, 모듈화 특성을 개선시키며, 제작의 용이성을 쾌할 수 있다. 제안된 스위칭 기법의 기본 아이디어를 이론적으로 분석하며, 타당성을 실험을 통하여 입증한다.

• Journal of Electrical Engineering and Technology
• /
• 제5권4호
• /
• pp.545-551
• /
• 2010

A new family of DC to AC converters, referred to as multilevel inverter, has received much attention from industries and researchers for its high power and voltage applications. One of the conventional techniques for implementing the switching algorithm in these inverters is optimized harmonic stepped waveform (OHSW). However, the major problem in using this technique is eliminating low order harmonics by solving the nonlinear and complex equations. In this paper, a new approach called the "bacterial foraging algorithm" (BFA) is employed. This algorithm eliminates and optimizes the harmonics in a multilevel inverter. This method has higher speed, precision, and convergence power compared with the genetic algorithm (GA), a famous evolutionary algorithm. The proposed technique can be expanded in any number of levels. The purpose of optimization is to remove some low order harmonics, as well as to ensure the fundamental harmonic retained at the desired value. As a case study, a 13-level inverter is chosen. The comparison results by MATLAB software between the two optimization methods (BFA and GA) have shown the effectiveness and superiority of BFA over GA where convergence is desired to achieve global optimum.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2001년도 전력전자학술대회 논문집
• /
• pp.352-355
• /
• 2001

This paper makes a general description of the results at government project which were peformed for several years. Through this project, the real capacity of 3.3KV/4MW Class 3 Level Voltage Source Inverter System were designed and the characteristics of its proto type were analyzed, moreover the web based IIMS(Inverter Information Management System) and Virtual Operation Simulator was developed. Now, this system is running for field application test.

• 전기학회논문지
• /
• 제56권4호
• /
• pp.705-715
• /
• 2007

Recently, the interest on power quality has been hot issue because the equipments cause voltage disturbance and have become more sensitive to the voltage disturbance. Additionally, the reseach on power electronic equipments applying to the high power has been increased. This paper deals with Line-Interactive Dynamic Voltage Restorer(LIDVR) system using 7-Level H-Bridge inverter, which is one of the solutions to compensate the voltage disturbance and to increase the power of equipments. The LIDVR has the following advantages comparing to the DVR with the series injection transformer. It has the power factor near to unity under the condition of normal source voltage, can compensate the harmonic current of the load and the instant interruption, and has the fast response. First, the construction, the operation mode and algebraic modeling of LIDVR are reviewed. And then the voltage control algorithm is proposed to get the sinusoidal load voltage with constant amplitude. Finally, simulation and experiment results verify the proposed LIDVR system.

• Journal of Power Electronics
• /
• 제17권4호
• /
• pp.914-922
• /
• 2017

Multilevel converters have attracted a lot of attention in recent years. The efficiency parameters of a multilevel converter such as the switching losses and total harmonic distortion (THD) mainly depend on the modulation strategy used to control the converter. Among all of the modulation techniques, the selective harmonic elimination (SHE) method is particularly suitable for high-power applications due to its low switching frequency and high quality output voltage. This paper proposes a new expression for the SHE problem in five-level converters. Based on this new expression, a simple analytical method is introduced to determine the feasible modulation index intervals and to calculate the exact value of the switching angles. For each selected harmonic, this method presents three-level or five-level waveforms according to the value of the modulation index. Furthermore, a flowchart is proposed for the real-time implementation of this analytical method, which can be performed by a simple processor and without the need of any lookup table. The performance of the proposed algorithm is evaluated with several simulation and experimental results for a single phase five-level diode-clamped inverter.

• Journal of Power Electronics
• /
• 제18권4호
• /
• pp.1037-1050
• /
• 2018

This paper presents a novel reconfigurable selective harmonic elimination technique to control harmonics over a wide range of Modulation Indexes (MI) in Multi-Level Inverter (MLI). In the proposed method, the region of the MI is divided into various sectors and expressions are formulated with different switching patterns for each of the sectors. A memetic BBO-MAS (Biogeography Based Optimization - Mesh Adaptive direct Search) optimization algorithm is proposed for solving the Selective Harmonic Elimination - Pulse Width Modulation (SHE-PWM) technique. An experimental prototype is developed using a Field Programmable Gate Array (FPGA) and their FFT spectrums are analyzed over a wide range of MI using a fluke power logger. Simulation and experimental results have validated the performance of the proposed optimization algorithms and the reconfigurable SHE-PWM technique. Further, the sensitivity of the harmonics has been analyzed considering non-integer variations in the magnitude of the input DC sources.