• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2005년도 ISMP
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• pp.67-88
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• 2005

Mold-Flow 3 Die Stack CSP of Mold array packaging with different Gate types. As high density package option such as 3 or 4 die stacking technologies are developed, the major concerning points of mold related qualities such as incomplete mold, exposed wires and wire sweeping issues are increased because of its narrow space between die top and mold surface and higher wiring density. Full 3D rheokinetic simulation of Mold flow for 3 die stacking structure case was done with the rheological parameters acquired from Slit-Die rheometer and DSC of commercial EMC. The center gate showed severe void but corner gate showed relatively better void performance. But in case of wire sweeping related, the center gate type showed less wire sweeping than corner gate types. From the simulation results, corner gate types showed increased velocity, shear stress and mold pressure near the gate and final filling zone. The experimental Case study and the Mold flow simulation showed good agreement on the mold void and wire sweeping related prediction. Full 3D simulation methodologies with proper rheokinetic material characterization by thermal and rheological instruments enable the prediction of micro-scale mold filling behavior in the multi die stacking and other complicated packaging structures for the future application.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 C
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• pp.1972-1975
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• 2002

In this paper, we have proposed low temperature co-fired ceramic (LTCC) based packaging for RF MEMS devices. The packaging structure is designed and evaluated with 3D full field simulation. 50 ${\Omega}$ matched coplanar waveguide(CPW) transmission line is employed as the test vehicle to evaluate the performances of the proposed package structure. The line is encapsulated with the LTCC packaging lid and connected to the via feed line. To reduce the insertion loss due to the packaging lid, the cavity with via post is formed in the packaging lid. The performances of the package structure is simulated with the different cavity depth and via-to-via length. Simulation results show that the proposed package structure has reflection loss better than 20 dB and insertion loss lower than 0.1 dB from DC to 30 GHz with the cavity depth and via-to-via length of 300 ${\mu}m$ and 350 ${\mu}m$, respectively. To realize the designed package structure, the cavity patterning is tested using the sandblast of LTCC.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2006년도 ISMP 2006
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• pp.109-124
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• 2006

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2005년도 ISMP
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• pp.51-65
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• 2005

• International Journal of Internet, Broadcasting and Communication
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• 제12권4호
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• pp.55-60
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• 2020

This study aims to apply Arduino and 3D printing technology considered as a key subject in the age of 4th industrial revolution which is a step 1 for customizing and applying the process of production by chemical molding companies producing environment-friendly biodegradable packaging materials to the 3D printing teaching in universities. Step 3 is applied to IoT for Arduino application, and 3D printing technology is also used on the basis of teaching creative integrated human resource. Integration of Arduino with 3D printers is based on the assumption that middle- and high-school students can learn it step by step to higher levels and university students majoring or not majoring in computing science can also have computing skills for solving 3D printing-based problems. For IoT application in this study, the 3D printing technology is applied to the external shape of products for producing an Arduino-based lighting fixture. The applied 3D printing technology is further extended to teaching modeling of producing packaging materials by chemical product molding companies in the age of 4th industrial revolution.

• 마이크로전자및패키징학회지
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• 제27권3호
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• pp.21-27
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• 2020

The importance of floating photovoltaic systems has recently been emerging to address some issues arising from the installation of conventional ground-mounted photovoltaics. Floating photovoltaics have a few advantages such as cutting down land usage, reducing water evaporation or creating algae. Though there is still necessity to supplement with technical issues: mechanical stability, reliability and long-term durability of floaters and modules. In this paper, we focus the current level of packaging development and introduce research trends that could be applied to next-generation floating photovoltaics.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.357-358
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• 2005

Compact power amplifier modules (PAM) for WCDMA/KPCS and GSM/WCDMA dual-band applications based on multilayer low temperature co-fired ceramic (LTCC) substrates are presented in this paper. The proposed modules are composed of an InGaP/GaAs HBT PAs on top of the LTCC substrates and passive components such as RF chokes and capacitors which are embedded in the substrates. The overall size of the modules is less than 6mm $\times$ 6mm $\times$ 0.8mm. The measured result shows that the PAM delivers a power of 28 dBm with a power added efficiency (PAE) of more than 30 % at KPCS band. The adjacent-channel power ratio (ACPR) at 1.25-MHz and 2.25-MHz offset is -44dBc/30kHz and -60dBc/30kHz, respectively, at 28-dBm output power. Also, the PAM for WCDMA band exhibits an output power of 27 dBm and 32-dB gain at 1.95 GHz with a 3.4-V supply. The adjacent-channel leakage ratio (ACLR) at 5-MHz and 10-MHz offset is -37.5dBc/3.84MHz and -48dBc/3.84MHz, respectively. The measured result of the GSM PAM shows an output power of 33.4 dBm and a power gain of 30.4 dB at 900MHz with a 3.5V supply. The corresponding power added efficiency (PAE) is more than 52.6 %.

• 마이크로전자및패키징학회지
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• 제16권4호
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• pp.5-8
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• 2009

In this paper, a high-quality low-temperature co-fired ceramic (LTCC) solenoid inductor using a solder ball and an air cavity on a silicon wafer for three-dimensional (3-D) system-in-package (SiP) is proposed. The LTCC multi-layer solenoid inductor is attached using Ag paste and solder ball on a silicon wafer with the air cavity structure. The air cavity is formed on a silicon wafer through an anisotropic wet-etching technology and is able to isolate the LTCC dielectric loss which is equivalent to a low k material effect. The electrical coupling between the metal layer and the LTCC dielectric layer is decreased by adopting the air cavity. The LTCC solenoid inductor using the solder ball and the air cavity on silicon wafer has an improved Q factor and self-resonant frequency (SRF) by reducing the LTCC dielectric resistance and parasitic capacitance. Also, 3-D device stacking technologies provide an effective path to the miniaturization of electronic systems.

• 마이크로전자및패키징학회지
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• 제12권4호통권37호
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• pp.323-330
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• 2005

저밀도 파장분할 방식 (CWDM)을 사용하는 광중계기와 광전송시스템에 사용할 수 있는 PIN PD (Positive Intrinsic Negative Photo Diode)를 제작하고 특성을 알아보았다. 특별히 제작된 CWDM 필터를 PD 패키지에 포함하여 일체형으로 제작하여 기존에 별도로 연결하여 사용하던 방법에 비해 작업성과성능 그리고 가격면에서 우수함을 보였다. 일체형 저밀도 파장분할 PD를 제작하기 위해서 CWDM 필터 조립 단계, PD 패키징 단계, 완제품 최종 조립 및 측정 단계의 3단계 과정을 수행하였다. 제작된 PD는 0.5 dB 대역폭이 17 nm, 투과 단자의 인접채널의 고립도는 60 dB 이상으로 측정되었고, 반사 단자의 고립도는 20 dB 이상으로 측정되었다. 무선주파수 특성을 위해 IMD3를 측정결과 63dBc 이상이었으며 PD의 응답도는 제작 샘플 23개중 20개가 0.9A/W 이상이었다. 일체형으로 제작함으로써 전체적인 삽입손실이 0.4-0.7 dB 정도 줄었다.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2001년도 The IMAPS-Korea Workshop 2001 Emerging Technology on packaging
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• pp.134-141
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• 2001