• Journal of electromagnetic engineering and science
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• v.15 no.2
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• pp.82-88
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• 2015

The magnetron, a vacuum tube, is currently the usual high-power microwave power source used for microwave heating. However, the oscillating frequency and output power are unstable and noisy due to the low quality of the high-voltage power supply and low Q of the oscillation circuit. A heating system with enhanced reliability and the capability for control of chemical reactions is desired, because microwave absorption efficiency differs greatly depending on the object being heated. Recent studies on microwave high-efficiency power amplifiers have used harmonic processing techniques, such as class-F and inverse class-F. The present study describes a high-efficiency 100 W GaN-HEMT amplifier that uses a harmonic processing technique that shapes the current and voltage waveforms to improve efficiency. The fabricated GaN power amplifier obtained an output power of 50.4 dBm, a drain efficiency of 72.9%, and a power added efficiency (PAE) of 64.0% at 2.45 GHz for continuous wave operation. A prototype microwave heating system was also developed using this GaN power amplifier. Microwaves totaling 400 W are fed from patch antennas mounted on the top and bottom of the microwave chamber. Preliminary heating experiments with this system have just been initiated.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.2
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• pp.18-23
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• 1992

Recently, SSPAs(Solid-State Power Amplifiers) with high linearity and efficiency replace TWTAs (Traveling-Wave-Tube Amplifiers) in satellite transponders. In this paper, a power amplifier with maximum output power is designed and constructed using GaAs FET(MGF-1302) as a test model for the development of SSPAs. For conjugate matching of input and output network, transimission lines and stubs are optimized using microwave CAD program, LINMIC+. Power amplifier is realized on the teflon substrate($\in$S1rT=2.45) with a bandwidth of 1GHz at a center frequency of 8GHz. Maximum stable gain of simulation and simulation and experimental result is obtained 9.23, 7.65 dB, respectively.

• Journal of electromagnetic engineering and science
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• v.9 no.2
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• pp.98-104
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• 2009

An InGaP/GaAs MMIC LC VCO designed with Harmonic Noise Frequency Filtering(HNFF) technique is presented. In this VCO, internal inductance is found to lower the phase noise, based on an analytic understanding of phase noise. This VCO directly drives the on-chip double balanced mixer to convert RF carrier to IF frequency through local oscillator. Furthermore, final power performance is improved by output amplifier. This paper presents the design for a 1.721 GHz enhanced LC VCO, high power double balance mixer, and output amplifier that have been designed to optimize low phase noise and high output power. The presented asymmetric inductance tank(AIT) VCO exhibited a phase noise of -133.96 dBc/Hz at 1 MHz offset and a tuning range from 1.46 GHz to 1.721 GHz. In measurement, on-chip down-converter shows a third-order input intercept point(IIP3) of 12.55 dBm, a third-order output intercept point(OIP3) of 21.45 dBm, an RF return loss of -31 dB, and an IF return loss of -26 dB. The RF-IF isolation is -57 dB. Also, a conversion gain is 8.9 dB through output amplifier. The total on-chip down-converter is implanted in 2.56${\times}$1.07 mm$^2$ of chip area.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.5
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• pp.688-693
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• 1999

This paper presents a very simple coupled line structure for MMIC which uses stacked microstrip line and does not employ any dielectric process step. For the analysis and optimization of these coupled line structure, HP-Momentum was used. The measured performance of 3 dB coupler shows 23 to 45 GHz broadband characteristics. Additionally, a balanced 2-stage Ka-Band power amplifier which uses the proposed 3 dB coupler, was also fabricated.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.326-329
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• 2003

In this paper, we designed and implemented a high power amplifier(HPA) to achieve the high Power Added Efficiency(PAE) over 40% at the 90W output power for the ISM-band(fo=2.45GHz). HPA presented in this paper has 3-stage drive amplifier and 1-stage final amplifier. In the final amplifier, we utilized balanced amplifier configuration with GaAs FET and each of two amplifiers has the push-pull configuration to increase PAE. From the measurement results, we obtained PAE of 42.95% at the 90.57W output power.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.3
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• pp.276-282
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• 2015

Until recently, power amplifiers using LDMOS were Class-AB and Doherty type, and showed 55 % efficiency for narrowband of 60 MHz bandwidth. However, owing to the RRH application of base stations power amplifier module, a bandwidth expansion of at least 100 MHz and high efficiency power amplifiers of at least 60 % power efficiency are required. In this study, a Class-J power amplifier was designed by optimizing an output matching circuit so that the second harmonic load will contain a pure reactance element only and have broadband characteristics by using GaN HEMT. The measurements showed that a 45 W Class-J power amplifier with a power added efficiency of 60~75 % was achieved when continuous wave signals were input at 1.6~2.3 GHz, including W-CDMA application.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.12
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• pp.1-6
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• 2008

In this paper, bias control circuit structure have been employed to improve the power added efficiency of the CMOS class-E power amplifier on low input power level. The gate and drain bias voltage has been controlled with the envelope of the input RF signal. The proposed CMOS class-E power amplifier using bias controlled circuit has been improved the PAE on low output power level. The operating frequency is 2.14GHz and the output power is 22dBm to 25dBm. In addition to, it has been evident that the designed the structure has showed more than a 80% increase in PAE for flatness over all input power level, respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.12
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• pp.7-12
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• 2008

In this paper, a highly efficiency power amplifier is presented for multi-band antenna system. The class F power amplifier operating in dual-band designed with one LDMOSFET. An operating frequency of power amplifier is 900 MHz and 2.14 GHz respectively Matching networks and harmonic control circuits of amplifier are designed by using the unit cell of composite right/left-handed(CRLH) transmission line(TL) realized with lumped elements. The CRLH TL can lead to metamaterial transmission line with the dual-band holing capability. The dual-band operation of the CRLH TL is achieved by the frequency offset and the nonlinear phase slope of the CRLH TL for the matching network of the power amplifier. Because the control of all harmonic components for high efficiency is very difficult, we have controled only the second- and third-harmonics to obtain the high efficiency with the CRLH TL. Also, the proposed power amplifier has been realized by using the harmonic control circuit for not only the output matching network, but also the input matching network for better efficiency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.2
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• pp.152-158
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• 2004

A low phase noise frequency synthesizer at X-Band which employs the subharmonic injection locking was designed and tested. The designed frequency synthesizer consists of a 1.75 GHz master oscillator - which also operates as a harmonic generator - and a 10.5 GHz slave oscillator. A 1.75 GHz master oscillator based on PLL technique used two transistors - one constitutes the active part of VCO and the other operates as a buffer amplifier as well as harmonic generator. The first stage operates a fixed locked oscillator and using the BJT transistor whose cutoff frequency is 45 GHz, the second stage is designed, operating as a harmonic generator. The 6th harmonic which is produced from the harmonic generator is injected into the following slave oscillator which also behaves as an amplifier having about 45 dB gain. The realized frequency synthesizer has a 7.4 V/49 mA, -0.5 V/4 mA of the low DC power consumption, 4.53 dBm of output power, and a phase noise of -95.09 dBc/Hz and -108.90 dBc/Hz at the 10 kHz and 100 kHz offset frequency, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.4
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• pp.440-446
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• 2011

In this paper, a X-band 50 W pulsed solid state power amplifier(SSPA) is designed and fabricated for radar systems. The SSPA consists of a driver amplifier, a high power amplifier, and a pulse modulator. The high power stage employes four 25 W GaAs FET to deliver 50 W at X-band. To meet the stringent target specification for the SSPA, we used a new hybrid pulse switching method, which combine the advantage of pulse modulation and bias switching method. The fabricated SSPA shows a power gain of 44.2 dB, an output power of 50 W over a 1.12 GHz bandwidth. Also, pulse droop < 1 dB meet the design goals and a rise/fall time is less than 12.45 ns. Fabricated X-band pulsed SSPA size is compact with overall size of $150{\times}105{\times}30\;mm^3$.