• 신재생에너지
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• 제17권4호
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• pp.36-45
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• 2021

To remove the Cu secondary phase remaining on the surface of a CIGSSe absorber layer manufactured by the two-step process, KCN etching was applied before depositing the CdS buffer layer. In addition, it was possible to increase the conversion efficiency by air annealing after forming the CdS buffer layer. In this study, various pre-treatment/post-treatment conditions wereapplied to the S-containing CIGSSe absorber layerbefore and after formation of the CdS buffer layer to experimentally confirm whether similareffects as those of Se-terminated CIGSe were exhibited. Contrary to expectations, it was noted that CdS air annealing had negative effects.

• Advances in Energy Research
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• 제3권2호
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• pp.117-124
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• 2015

In this paper, we have reported an enhancement in thermoelectric properties of un-doped zinc oxide (ZnO) grown by molecular beam epitaxy (MBE) on silicon (001) substrate by annealing treatment. The grown ZnO thin films were annealed in oxygen environment at $500^{\circ}C-800^{\circ}C$, keeping a step of $100^{\circ}C$ for one hour. Room temperature Seekbeck measurements showed that Seebeck coefficient and power factor increased from 222 to $510{\mu}V/K$ and $8.8{\times}10^{-6}$ to $2.6{\times}10^{-4}Wm^{-1}K^{-2}$ as annealing temperature increased from 500 to $800^{\circ}C$ respectively. This observation was related with the improvement of crystal structure of grown films with annealing temperature. X-ray diffraction (XRD) results demonstrated that full width half maximum (FWHM) of ZnO (002) plane decreased and crystalline size increased as the annealing temperature increased. Photoluminescence study revealed that the intensity of band edge emission increased and defect emission decreased as annealing temperature increased because the density of oxygen vacancy related donor defects decreased with annealing temperature. This argument was further justified by the Hall measurements which showed a decreasing trend of carrier concentration with annealing temperature.

• 한국전기전자재료학회논문지
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• 제30권11호
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• pp.734-739
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• 2017

We prepared $SnS_x$ thin films on both soda-lime glass (SLG) and molybdenum(Mo)/SLG substrates by a two-step process using a Sn precursor followed by sulfur reaction in rapid thermal annealing (RTA) at different sulfurization temperatures ($Ts=200^{\circ}C$, $230^{\circ}C$, $250^{\circ}C$, and $300^{\circ}C$) and annealing times ($t_s=10min$ and 30 min). The single SnS phase was dominant for $200^{\circ}C{\leq}T_s$<$250^{\circ}C$, while an additional phase of $SnS_2$ was appeared at $T_s{\geq}250^{\circ}C$ alongside SnS. The SnS grains in all the samples showed strong growth along the preferred [040] direction. The band-gap energy ($E_g$) of the films was estimated to be 1.24 eV.

• E2M - 전기 전자와 첨단 소재
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• 제9권6호
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• pp.584-592
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• 1996

Coupling optical modulator which on the $LiTaO_3$ substrate is fabricated by using proton exchange method and self-aligned method. Proton exchange of proton diffusion method was applied to pattern a waveguide on $LiTaO_3$ substrate. The annealing at >$400^{\circ}C$ was carded out to control waveguide width and depth. The depths of the two annealed optical waveguides, which were measured by using .alpha.-step, were 1.435 K.angs. and 1.380 K.angs. Using .alpha.-step facility, we examined that the width of waveguides is increased from 5.mu.m to 6.45 .mu.m and 6.3.mu.m due to the annealing effects. The process of proton exchange was done at 150.deg. C for 120 min, >$200^{\circ}C$ for 60 min and annealing process was done at >$400^{\circ}C$ for 90 min, >$400^{\circ}C$ for 60 min. The high speed coupling optical modulator has very good figures of merits; the measured high frequency power were achieved.

• 한국진공학회지
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• 제2권2호
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• pp.161-165
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• 1993

Si(100)와 Si(111) 표면에 에피 성장시킨 Ge의 기하학적, 전기적 구조가 scanning tunneling microscope로 연구되었다. Ge 원자는 scanning tunneling spectroscopy와 bias 전압을 달리한 STM 상에서 Si 원자와 구별되었다. 이것을 이용하여 Ge의 성장 형태를 연구하였다. (2${\times}$1) 재배열 구조를 가진 (100) 표면에서 Ge 성장층은 720K에서 B형의 step edge로부터 주로 성장하였다. (111) 표면에서도 주로 step edge에서 성장하였으며, Ge의 양과 annealing 온도에 따라 (5${\times}$5)와 (7${\times}$7)구조가 보였다.

• Journal of Ceramic Processing Research
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• 제13권spc1호
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• pp.59-63
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• 2012

Ga2O3-core/CdO-shell nanowires were synthesized by a two step process comprising thermal evaporation of GaN powders and sputter-deposition of CdO. Transmission electron microscopy (TEM) and X-ray diffraction (XRD) analyses revealed that the cores and the shells of the annealed coaxial nanowires were single crystal of monoclinic Ga2O3 and FCC CdO, respectively. As-synthesized Ga2O3 nanowires showed a broad emission band at approximately 460 nm in the blue region. The blue emission intensity of the Ga2O3 nanowires was slightly decreased by CdO coating, but it was significantly increased by subsequent thermal annealing in a reducing atmosphere. The major emission peak was also shifted from ~500 nm by annealing in a reducing atmosphere, which is attributed to the increases in the Cd interstitial and O vacancy concentrations in the cores.

• 한국표면공학회지
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• 제33권2호
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• pp.101-106
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• 2000

SOI (Silicon-On-Insulator) substrates were fabricated with varying annealing temperature of $25-660^{\circ}C$ by a linear annealing method, which was modified RTA process using a linear shape heat source. The annealing method was applied to Si ∥ $SiO_2$/Si pair pre-contacted at room temperature after wet cleaning process. The bonding strength of SOI substrates was measured by two methods of Razor-blade crack opening and direct tensile test. The fractured surfaces after direct tensile test were also investigated by the optical microscope as well as $\alpha$-STEP gauge. The interface bonding energy was 1140mJ/m$^2$ at the annealing temperature of $430^{\circ}C$. The fracture strength was about 21MPa at the temperature of $430^{\circ}C$. These mechanical properties were not reported with the conventional furnace annealing or rapid thermal annealing method at the temperature below $500^{\circ}C$. Our results imply that the bonded wafer pair could endure CMP (Chemo-Mechanical Polishing) or Lapping process without debonding, fracture or dopant redistribution.

• 한국생산제조학회지
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• 제20권2호
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• pp.174-179
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• 2011

This paper focuses on the optimal step-over value for magnetic tool path. Since magnetic flux density is changed according to distance from center of magnetic tool. Enhanced surface roughness is also different according to change of radius. Therefore, to get a identical surface roughness on workpiece, it is necessary to find optimal tool path including step-over. In this study, response surface models for surface roughness according to change of radiuses were developed, and then optimal enhanced surface roughness for each radius was selected using genetic algorithm and simulated annealing to investigate relation between radius and surface roughness. As a result, it found that step-over value of 6.6mm is suitable for MAP of magnesium alloy.

• 한국재료학회지
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• 제5권6호
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• pp.723-731
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• 1995

x=0.4-0.6이고 작은 $\delta$값을 갖는 P $b_2$S $r_2$( $Y_{1-x}$ C $a_{x}$)C $u_3$ $O_{8+}$$\delta$/초전도체시료를 제조하였다. 시료가 초전도체로 되기 위하여 작은 $\delta$값을 가져야 하는데 이를 위해 소결 후 직접 낮은 산소분압에서 annealing하면 산화성 상분해가 발생하여 과잉의 2차상이 생성된다. 따라서 제조과정중 산화성 상분해의 양을 줄이기 위하여 두 단계의 annealing 과정을 도입하였다. 즉 100% 아르곤 기체 분위기에서의 소결 후 먼저 100% 산소 분위기하에서 시료를 annealing하여 산화시킨 후 0.1~1.0% 산소분압하에서 annealing하여 작은 $\delta$값을 얻는 것이다. 얻어진 시료의 전기저항 측정결과 80K의 초전도 전이온도( $T_{c}$)가 얻어져 지금까지 이 화합물에서 보고된 결과중 가장 높은 $T_{c}$를 나타내었다. 그러나 본 연구에서 도입한 두단계 annealing 과정에 의해서도 작은 $\delta$값을 얻기 위하여는 약간의 산화성 상분해가 발생하여 깨끗한 초전도 전이과정을 블 수 없었다. 수 없었다..

• 한국초전도학회:학술대회논문집
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• 한국초전도학회 1999년도 High Temperature Superconductivity Vol.IX
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• pp.87-90
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• 1999

We have studied the annealing effects of 570 (SrTiO$_3$) single crystal substrate and the I-V properties of step-edge junctions after Ar ion milling. YBa$_2Cu_3O_7$ (YBCO) thin films are fabricated on the substrates by using pulsed laser deposition (PLD) and photolithography. The surface of Ar ion milled substrate was characterized with atomic force microscope (AFM) and scanning electron microscope (SEM) images. After the substrate was damaged by milling, the critical current density of YBCO thin films deposited on the substrate was lowered. The annealing of the damaged substrate at about 1000 $^{\circ}C$ recovered the critical current density to that before the milling. Futhermore the annealing helped junction formation due to high quality film and increased the yield rate for the fabrication of high quality step-edge junction.