• Title/Summary/Keyword: 2 Step delay

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Problem Analysis and Improvement Strategy for Feasibility Analysis of Overseas Plant Construction Projects (해외 플랜트 건설사업의 타당성 분석 문제점 및 개선방안)

  • Lee, Won-Gyu;Park, Moon-Sun;Kim, Yong-Su
    • Korean Journal of Construction Engineering and Management
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    • v.11 no.5
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    • pp.3-14
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    • 2010
  • This study investigated and analyzed feasibility analysis case studies, carried out by contractor of EPC LSTK projects in the planning stage to suggest the strategies to solve problems for project improvement. For this, five feasibility analysis case studies of gulf cooperation council (GCC) countries were reviewed and investigated. The results can be summarized as follows: 1) Those factors needed to be analyzed, including cost increase, project delay, quality decrease were insufficiently considered when assessing feasibility. 2) And improvement strategies for three problems mentioned above were suggested based on findings in feasibility analysis. 3) Lastly the process of the project feasibility analysis that can be applied to overseas plant construction project was suggested step by step.

Efficient VLSI Architecture for Disparity Calculation based on Geodesic Support-weight (Geodesic Support-weight 기반 깊이정보 추출 알고리즘의 효율적인 VLSI 구조)

  • Ryu, Donghoon;Park, Taegeun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.9
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    • pp.45-53
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    • 2015
  • Adaptive support-weight based algorithm can produce better disparity map compared to generic area-based algorithms and also can be implemented as a realtime system. In this paper, we propose a realtime system based on geodesic support-weight which performs better segmentation of objects in the window. The data scheduling is analyzed for efficient hardware design and better performance and the parallel architecture for weight update which takes the longest delay is proposed. The exponential function is efficiently designed using a simple step function by careful error analysis. The proposed architecture is designed with verilogHDL and synthesized using Donbu Hitek 0.18um standard cell library. The proposed system shows 2.22% of error rate and can run up to 260Mhz (25fps) operation frequency with 182K gates.

Optimization of DMAIC for production system developer task : Focused on Battery Manufacturing (DMAIC 방법론의 생산시스템 개발자 과제 최적화 모델링: 배터리 제조 중심으로)

  • Shin Chul Park;Joo Yeoun Lee;Myoung Sug Jung
    • Journal of Korea Society of Industrial Information Systems
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    • v.29 no.2
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    • pp.153-167
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    • 2024
  • DMAIC is the most familiar problem-solving methodology to battery manufacturing-related engineers, but continuous problems such as task delay, insufficient performance, and partial optimization are occurring due to indiscriminate application to various tasks of battery production system developers. In order to secure an "optimized model for DMAIC methodology" that can effectively respond to battery production system developers' tasks, a three-stage research model was used to derive the required characteristics of the production system developer task methodology, analyze the suitability of DMAIC, and conduct optimization modeling by supplementing the shortcomings. It was confirmed that the DMAIC methodology can be more suitable by applying the "system structural seven-step methodology", which is the result of this study, to developer tasks. It is expected that it will be applied to various industrial fields in the future by making it easier to learn and allowing differentiated operations according to the characteristics of various industries.

Predicting the Significance of On-Chip Inductance Issues Based on Inductance Screening Results (Interconnect Scaling에 따른 온칩 인터커넥 인덕턴스의 중요성 예측)

  • Kim, So-Young
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.3
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    • pp.25-33
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    • 2011
  • As chip operating frequency increases, there is growing concern about on-chip interconnect inductance. This paper presents a two-step inductance screening tool to select interconnects with significant inductance effects in a VLSI design. Test chips designed in different CMOS technology nodes are examined. The inductance screening results show that 0.1% of the nets in a design have inductance problems with chips running at its operating frequency, supporting the necessity of a screening process instead of adding inductance model to all the nets in the design. The increase in resistance due to geometry scaling will strongly affect the significance of inductance on delay as technology and frequency scale. Since higher frequency worsens inductance problem and geometry scaling alleviates it, inductance screening tool can provide useful guidelines to circuit designers.

A Study on the E-TDLNN Method for the Behavioral Modeling of Power Amplifiers (전력 증폭기의 Behavioral 모델링을 위한 E-TDLNN 방식에 관한 연구)

  • Cho, Suk-Hui;Lee, Jong-Rak;Cho, Kyung-Rae;Seo, Tae-Hwan;Kim, Byung-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.10
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    • pp.1157-1162
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    • 2007
  • In this paper, E-TDLNN(Expanded-Tapped Delay Line Neural Network) method is suggested to make the model of power amplifier effectively. This method is the one for making the model of power amplifier through the study in neural network to the target value, the measured output spectrum of power amplifier, after adding the external value factor, gate bias, as an invariant input to the TDLNN method which suggested the memory effect of power amplifier effectively. To prove the validity of suggested method, the data at 2 points, 3.45 V and 3.50 V of gate bias range $3.4{\sim}3.6V$ with the 0.01 V step change, are studied and the predicted results at the gate bias 3.40 V, 3.48 V, 3.53 V and 3.60 V shows good coincidence with the measured values.

A Study on Iterative MAP-Based Turbo Code over CDMA Channels (CDMA 채널 환경에서의 MAP 기반 터보 부호에 관한 연구)

  • 박노진;강철호
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2000.12a
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    • pp.13-16
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    • 2000
  • In the recent mobile communication systems, the performance of Turbo Code using the error correction coding depends on the interleaver influencing the free distance determination and the recursive decoding algorithms that is executed in the turbo decoder. However, performance depends on the interleaver depth that need great many delay over the reception process. Moreover, Turbo Code has been known as the robust coding methods with the confidence over the fading channel. The International Telecommunication Union(ITU) has recently adopted as the standardization of the channel coding over the third generation mobile communications the same as IMT-2000. Therefore, in this paper, we proposed of that has the better performance than existing Turbo Decoder that has the parallel concatenated four-step structure using MAP algorithm. In the real-time voice and video service over the third generation mobile communications, the performance of the proposed method was analyzed by the reduced decoding delay using the variable decoding method by computer simulation over AWGN and lading channels.

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Active structural control via metaheuristic algorithms considering soil-structure interaction

  • Ulusoy, Serdar;Bekdas, Gebrail;Nigdeli, Sinan Melih
    • Structural Engineering and Mechanics
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    • v.75 no.2
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    • pp.175-191
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    • 2020
  • In this study, multi-story structures are actively controlled using metaheuristic algorithms. The soil conditions such as dense, normal and soft soil are considered under near-fault ground motions consisting of two types of impulsive motions called directivity effect (fault normal component) and the flint step (fault parallel component). In the active tendon-controlled structure, Proportional-Integral-Derivative (PID) type controller optimized by the proposed algorithms was used to achieve a control signal and to produce a corresponding control force. As the novelty of the study, the parameters of PID controller were determined by different metaheuristic algorithms to find the best one for seismic structures. These algorithms are flower pollination algorithm (FPA), teaching learning based optimization (TLBO) and Jaya Algorithm (JA). Furthermore, since the influence of time delay on the structural responses is an important issue for active control systems, it should be considered in the optimization process and time domain analyses. The proposed method was applied for a 15-story structural model and the feasible results were found by limiting the maximum control force for the near-fault records defined in FEMA P-695. Finally, it was determined that the active control using metaheuristic algorithms optimally reduced the structural responses and can be applied for the buildings with the soil-structure interaction (SSI).

An Auto-tuing of PID Conrtroller using Genetic Algorithms (유전자 알고리즘을 사용한 PID제어기의 자동동조)

  • 이수흠;정순현
    • Journal of the Institute of Convergence Signal Processing
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    • v.3 no.2
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    • pp.71-75
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    • 2002
  • We propose a new method to deal with the optimized auto-tuning for the PID controller which is used to the process-control in various fields. First of all, in this method, 1st order delay system with dead time which is modelled from the unit step response of the system is Pade-approximated, then initial values are determined by the Ziegler-Nichols method and deciding binary strings of parents generation using by the fitness values of genetic algorithms, we perform selection, crossover and mutation to generate the descendant generation. The advantage of this method is better than the Ziegler-Nickels method in characteristic of output, and has extent of applying without limit of K, L, T parameters.

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A Study on Optical Coherence Tomography System by Using the Optical Fiber (광섬유를 이용한 광영상단층촬영기 제작에 관한 연구)

  • 양승국;박양하;장원석;오상기;이석정;김기문
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.18 no.4
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    • pp.34-40
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    • 2004
  • In this paper, we have studied the OCT(Optical Coherence Tomography) system which has been advantages of high resolution, 2-D cross-sectional images, low cost and small size configuration. The characteristics of light source determine the resolution and coherence length. The light source has a commercial SLD with a central wavelength of 1,285 ill11, 35.3 nm(FWHM). The optical delay line is necessary to make equal with the optical path length to scattered light or reflected light from a sample. In order to make equal the optical path length, the stage that is attached to a reference mirror is controled by a step motor. And the interferometer is configured with the Michelson interferometer by using a single mode fiber, and the scanner can be focused on the sample by using a reference ann Also, the 2-dimension cross-sectional images were measured with scanning the transverse direction of the sample by using a step motor. After detecting the internal signal of lateral direction, a scanner is moved to obtain the cross-sectional image of 2-dimension by using step motor. A photodiode, which has high detection sensitivity and excellent noise characteristics has been used. The detected small signal has a noise and interference. After filtering and amplifying the signal, the output signal is demodulated the waveform And then, a cross-sectional image is seen through converting this signal into a digitalized signal by using an AID converter. The resolution of the sample is about 30${\mu}{\textrm}{m}$, which corresponds to the theoretical resolution. Also, the cross-sectional images of onion cells were measured in real time scheme.

Implementation of Speed Limitation Controller Considering Motor Parameter Variation in High Speed Operation (모터 파라미터 산포를 고려한 고속 운전에서의 속도제한 제어기 구현)

  • Kim, Kyung-Hoon;Yun, Chul;Kwon, Woo-Hyen
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.11
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    • pp.1584-1590
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    • 2017
  • This paper presents a implementation method of reliable speed limitation controller considering motor parameter variation in high speed operation. In spinning process of drum washing machine, speed increase has to be limited when unallowable imbalance mass is detected. Otherwise, severe noise and vibration can happen because noise and vibration are proportional to imbalance mass. To detect imbalance mass, d-axis current magnitude is used. However, we have to compensate for back-emf and power supply variation by means of detecting them because d-axis current is affected by both of them. On the other hand, we have to carefully estimate back-emf because back-emf is affected by stator resistance variation and inverter voltage error. Stator resistance variation can happen by manufacturing process for mass production or temperature variation in running. And there are inverter voltage errors between command voltage from micro-computer to inverter and real voltage from inverter to motor because of rising and falling time delay and turn-on resistance of power semiconductor switch. To solve this problem, we propose 2-step align current injection method which is to inject step-wise current right before starting. By this method, we can simply obtain stator resistance by ratio of voltage without inverter voltage error and current, and we can measure inverter voltage error. So we can obtain more exact model current, and then by simple calculation with compensation gain, we can estimate more accurate motor back-emf. We show that this method works well. It is verified through experiments.