• Journal of KIISE:Computing Practices and Letters
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• v.9 no.5
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• pp.560-566
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• 2003

Recently, many researches on RC(Reconfigurable Computing) with highly complex FPGA's and reconfigurable processors have been reported, and even some attempts for commercialization have been successful. In this paper, we introduce the design methodology for implementing DES crypto algorithm on small-capacity FPGA by using its dynamic reconfigurability and a system-level verification technique. Throughout this design project, we could evaluate the effectiveness of this approach, which is the dynamic reconfigurability of FPGAs makes the efficient trade-off between the performance and the cost robustly viable.