• Title/Summary/Keyword: 핸들러

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Implementation of Scenario-based AI Voice Chatbot System for Museum Guidance (박물관 안내를 위한 시나리오 기반의 AI 음성 챗봇 시스템 구현)

  • Sun-Woo Jung;Eun-Sung Choi;Seon-Gyu An;Young-Jin Kang;Seok-Chan Jeong
    • The Journal of Bigdata
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    • v.7 no.2
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    • pp.91-102
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    • 2022
  • As artificial intelligence develops, AI chatbot systems are actively taking place. For example, in public institutions, the use of chatbots is expanding to work assistance and professional knowledge services in civil complaints and administration, and private companies are using chatbots for interactive customer response services. In this study, we propose a scenario-based AI voice chatbot system to reduce museum operating costs and provide interactive guidance services to visitors. The implemented voice chatbot system consists of a watcher object that detects the user's voice by monitoring a specific directory in real-time, and an event handler object that outputs AI's response voice by performing inference by model sequentially when a voice file is created. And Including a function to prevent duplication using thread and a deque, GPU operations are not duplicated during inference in a single GPU environment.

Study on the LAN/ISDN Interface Through Frame Relay (프레임릴레이를 통한 LAN/ISDN 인터페이스 연구)

  • 양충렬;김진태
    • Information and Communications Magazine
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    • v.11 no.4
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    • pp.62-70
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    • 1994
  • This paper discusses the LAN interface technics physically applicable to the ISDN exchange system through frame relay without changing of the basic exchange architecture. To ensure the success of frame relaying, it's interworking with the existing X.25 services is very imported, and for this purpose both X.75 and 1.122-based interworking alternative must be considered. Definition required to frame relay, interconnection of remote bridge and ways to design the Frame Handler carrying a frame realying in the ISDN node was introduced here. Subsequently, alternatives using the X.25 and X.75 or 1.122 as well as interconnection mechanism LAN and ISDN for the LAN interface and LAN and/or LAN interface and ISDN through frame relay was individually introduced. Through frame relay applications in the major countries, the achievement of high speed frame relaying service to the LAN was introduced.

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Reengineering Template-Based Web Applications to Single Page AJAX Applications (단일 페이지 AJAX 애플리케이션을 위한 템플릿 기반 웹 애플리케이션 재공학 기법)

  • Oh, Jaewon;Choi, Hyeon Cheol;Lim, Seung Ho;Ahn, Woo Hyun
    • KIPS Transactions on Software and Data Engineering
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    • v.1 no.1
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    • pp.1-6
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    • 2012
  • Web pages in a template-based web application (TWA) are automatically populated using a template shared by the pages with contents specific to the pages. So users can easily obtain information guided by a consistent structure of the template. Reduced duplicated code helps to increase the level of maintainability as well. However, TWA still has the interaction problem of classic web applications that each time a user clicks a hyperlink a new page is loaded, although a partial update of the page is desirable. This paper proposes a reengineering technique to transform the multi-page structure of legacy Java-based TWA to a single page one with partial page refresh. In this approach, hyperlinks in HTML code are refactored to AJAX-enabled event handlers to achieve the single page structure. In addition, JSP and Servlet code is transformed in order not to send data unnecessary for the partial update. The new single page consists of individual components that are updateable independently when interacting with a user. Therefore, our approach can improve interactivity and responsiveness towards a user while reducing CPU and network usage. The measurement of our technique applied to a typical TWA shows that our technique improves the response time of user requests over the TWA in the range from 1 to 87%.

Transient Overloads Control Mechanism for Virtual Memory System (가상 메모리 시스템의 일시적인 과부하 완화 기법)

  • Go, Young-Woong;Lee, Jae-Yong;Hong, Cheol-Ho;Yu, Hyukc
    • The KIPS Transactions:PartA
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    • v.8A no.4
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    • pp.319-330
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    • 2001
  • In virtual memory system, when a process attempts to access a page that is not resident in memory, the system generates and handles a page fault that causes unpredictable delay. So virtual memory system is not appropriate for the real-time system, because it can increase the deadline miss ratio of real-time task. In multimedia system, virtual memory system may degrade the QoS(quality of service) of multimedia application. Furthermore, in general-purpose operating system, whenever a new task is dynamically loaded, virtual memory system suffers from extensive page fault that cause transient overloading state. In this paper, we present efficient overloading control mechanism called RBPFH (Rate-Based Page Fault Handling). A significant feature of the RBPFH algorithm is page fault dispersion that keeps page fault ratio from exceeding available bound by monitoring current system resources. Furthermore, whenever the amount of available system resource is changed, the RBPFH algorithm dynamically adjusts the page fault handling rate. The RBPFH algorithm is implemented in the Linux operating system and its performance measured. The results demonstrate RBPFH\`s superior performance in supporting multimedia applications. Experiment result shows that RBPFH could achieve 10%∼20% reduction in deadline miss ratio and 50%∼60% reduction in average delay.

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A 3-D Vision Sensor Implementation on Multiple DSPs TMS320C31 (다중 TMS320C31 DSP를 사용한 3-D 비젼센서 Implementation)

  • Oksenhendler, V.;Bensrhair, Abdelaziz;Miche, Pierre;Lee, Sang-Goog
    • Journal of Sensor Science and Technology
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    • v.7 no.2
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    • pp.124-130
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    • 1998
  • High-speed 3D vision systems are essential for autonomous robot or vehicle control applications. In our study, a stereo vision process has been developed. It consists of three steps : extraction of edges in right and left images, matching corresponding edges and calculation of the 3D map. This process is implemented in a VME 150/40 Imaging Technology vision system. It is a modular system composed by a display, an acquisition, a four Mbytes image frame memory, and three computational cards. Programmable accelerator computational modules are running at 40 MHz and are based on TMS320C31 DSP with a $64{\times}32$ bit instruction cache and two $1024{\times}32$ bit internal RAMs. Each is equipped with 512 Kbytes static RAM, 4 Mbytes image memory, 1 Mbytes flash EEPROM and a serial port. Data transfers and communications between modules are provided by three 8 bit global video bus, and three local configurable pipeline 8 bit video bus. The VME bus is dedicated to system management. Tasks between DSPs are distributed as follows: two DSPs are used to edges detection, one for the right image and the other for the left one. The last processor computes the matching process and the 3D calculation. With $512{\times}512$ pixels images, this sensor generates dense 3D maps at a rate of about 1 Hz depending of the scene complexity. Results can surely be improved by using a special suited multiprocessors cards.

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