• Journal of the Korea Society for Simulation
• /
• v.23 no.4
• /
• pp.181-188
• /
• 2014

Heterogeneous physical systems and computational devices are incorporated on a large-scale in a CPS (cyber-physical system) environment. Simulations can be useful for the reliable behaviors of CPSs. Time synchronization is one of major technical issues for the simulations. In the CPS, distributed systems control themselves by interacting with each other during runtime. When some simulation models have high complexity, wrong control commands as well as incorrect data can be exchanged due to the time error. We propose a time synchronization algorithm for the hybrid model that has characteristics of both continuous time systems and discrete event systems. In addition, we develop a CPS simulator based on our algorithm. For the verification of the algorithm and the execution of the simulator, we develop an example hybrid model and simulate considering user controls as well as interactions among the distributed systems.

• Journal of the Institute of Convergence Signal Processing
• /
• v.12 no.4
• /
• pp.286-290
• /
• 2011

LBS(Location Based System) is the essential technology of ubiquitous market and utilizes the GNSS(Global Navigation Satellite). GNSS includes GPS of USA, Galileo of Europe Union, QZSS of Japan, Compass of China, and IRNSS of India. Related researches have recently been conducted. Once the satellite is launched, the maintenance such as modification and verification of its function is difficult. Therefore, before the launch of satellites, more precise and concrete verification of performance and operations are needed. In order to do this, hardware testbed may be developed. but software simulators can provide more flexible and cost effective simulation results. These simulators should provide the essential function handling all kinds of error features experienced upon propagation of the GNSS signal. In this paper, we present a design and implementation results of a window-based simulator applying the modeling of various error features for several GNSS.

• Journal of KIISE:Computer Systems and Theory
• /
• v.35 no.9_10
• /
• pp.485-496
• /
• 2008

As the complexity of SoC (System-on-Chip) design increases dramatically. traditional system performance analysis and verification methods based on RTL (Register Transfer Level) are no more valid for increasing time-to-market pressure. Therefore a new design methodology is desperately required for system verification in early design stages. and hardware software (HW-SW) cosimulation at TLM (Transaction Level Modeling) level has been researched widely for solving this problem. However, most of HW-SW cosimulators support few restricted ion levels only, which makes it difficult to integrate HW-SW cosimulators with different ion levels. To overcome this difficulty, this paper proposes a multipurpose framework for HW SW cosimulation to provide systematic SoC design flow starting from software application design. It supports various design techniques flexibly for each design step, and various HW-SW cosimulators. Since a platform design is possible independently of ion levels and description languages, it allows us to generate simulation models with various ion levels. We verified the proposed framework to model a commercial SoC platform based on an ARM9 processor. It was also proved that this framework could be used for the performance optimization of an MJPEG example up to 44% successfully.

• KIPS Transactions on Software and Data Engineering
• /
• v.12 no.6
• /
• pp.275-284
• /
• 2023

Virtual reality simulations are used for education and training in various fields, and are especially widely used in the medical field recently. The education/training simulator consists of tactile/force feedback generation and image/sound output hardware that provides a sense similar to a doctor's treatment of a real patient using real surgical tools, and software that produces realistic images and tactile feedback. Existing simulators are complicated and expensive because they have to use various types of hardware to simulate various surgical instruments used during surgery. In this paper, we propose a dental surgical simulation system using a force feedback device and a morphable haptic controller. Haptic hardware determines whether the surgical tool collides with the surgical site and provides a sense of resistance and vibration. In particular, haptic controllers that can be deformed, such as length changes and bending, can express various senses felt depending on the shape of various surgical tools. When the user manipulates the haptic feedback device, events such as movement of the haptic feedback device or button clicks are delivered to the simulation system, resulting in interaction between dental surgical tools and oral internal models, and thus haptic feedback is delivered to the haptic feedback device. Using these basic techniques, we provide a realistic training experience of impacted wisdom tooth extraction surgery, a representative dental surgery technique, in a virtual environment represented by sophisticated three-dimensional models.

• Science of Emotion and Sensibility
• /
• v.7 no.3
• /
• pp.27-35
• /
• 2004

This study has investigated a psychological status of optimal and pleasant driving condition by measuring various physiological signals using SCR(skin conductance response), PPG(peripheral plethysmograph), SKT(skin temperature) and HR(heart rate). The physiological response was measured during various simulated driving conditions. We developed a hardware and algorithm to measure and analyze the physiological response. The physiological signals has reflected the level of driver's tension or relaxation as well as the heart rate. The emotional responses of drivers were also measured and analyzed in this experiment. The result of the study can be used to design a system to enhance the driver's emotional satisfaction as well as to monitor the driver's safety and health condition.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2003.10a
• /
• pp.416-419
• /
• 2003

The cellular neural networks have the circuit structure that differs from the form of general neural network. It consists of an array of the same cell which is a simple processing element, and each of the cells has local connectivity and space invariant template property. In this paper, time-multiplex image processing technique is applied for processing large images using small size CNN cell block, and we simulate the edge detection of a large image using the simulator implemented with a c program and matlab model. A 5$\times$5 CNN hardware and pre post processor is also implemented and is under test.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.43 no.5 s.311
• /
• pp.44-59
• /
• 2006

This paper describes the efficient implementation of DNA sequence generate system with genetic algorithm for reducing computation time of NACST. The proposed processor is based on genetic algerian with fitness functions which would suit the point of reference for generated sequences. In order to implement efficient hardware structure, we used the pipelined structure. In addition our design was applied the parallelism to achieve even better simulation time than the sequence generator system which is designed on software. In this paper, our hardware is implemented on the FPGA board with xc2v6000 devices. Through experiment, the proposed hardware achieves 467 times speed-up over software on a PC and sequence generate performance of hardware is same with software.

• Proceedings of the Korea Society for Simulation Conference
• /
• 1992.10a
• /
• pp.2-2
• /
• 1992

최근 여러 분야에서 컴퓨터의 용도가 확산되고 더 높은 computing power에 대한 요구가 증가함에 따라, 컴퓨터의 성능을 향상시키기 위하여 프로세서의 고속화와 함께 시스템 구조의 개선을 위한 많은 연구가 진행되고 있다. 한 시스템내에 여러 개의 CPU들이 존재하는 다중프로세서 시스템(multiprocessor system) 구조를 가진 슈퍼미니급 중형 컴퓨터들은 상호연결망으로서 버스(bus) 방식을 많이 채택하고 있다. 버스 구조는 하드웨어가 간단하여 구현이 용이하지만, 여러 개의 시스템 지원들(프로세서들, 기억장치 모듈들 및 입출력 모듈들)이 버스를 공유하기 때문에 경합으로 인한 지연 시간이 발생하게 된다. 이러한 지연 시간으로 인한 성능 저하를 개선하는 방법으로는 버스 수의 증가와 최적 통제 프로토콜의 설계가 있다. 본 연구에서는 여러 개의 버스를 가진 다중프로세서 시스템에서 4가지 대표적인 버스 중재 프로토콜들에 대해 성능을 분석, 비교하여 최적 프로토콜을 제시하고자 한다. 이러한 대규모 하드웨어에 의하여 구현되는 시스템에서 주요 설계 요소들에 따른 시스템 성능 분석과 비교는 설계 단계에서 필수적인 과정이다. 그러나 하드웨어를 만들어서 분석하는 방법은 시간과 비용이 많이 소요되기 때문에 소프트웨어 시뮬레이션 방법이 널리 사용되고 있다. 본 연구팀에서는 시뮬레이션 전용언어인 SLAM II를 이용하여 다중프로세서 시스템의 시뮬레이터를 개발하고, 버스중재 프로토콜(bus arbitration protocol)을 용이하게 변경할 수 있도록 하여 각각의 성능을 비교하였다. 이 연구에서 비교된 프로토콜들은 고정-우선순위 방식(fixed-priority scheme), FIFO(first-in first-out) 방식, 라운드-로빈 방식(round-robin scheme), 및 회전-우선순위 방식(rotating-priority scheme) 등이다. 실험은 시스템의 주요 요소들인 프로세서와 기억장치 모듈 및 버스의 수들을 변경시킴으로써 다양한 시스템 환경에 대한 분석을 시도하였다. 작업 부하가 되는 기하장치 액세스 요구간 시간가격(inter-memory access request time interval)은 필요에 따라서 고정값 또는 확률 분포함수를 사용하였다. 특히, 실행될 프로그램의 특성에 따라 각 프로토콜의 성능이 다르게 나타날 수 있음을 검증하였으며, 기억장치의 지역성(memory locality)에 대한 프로토콜들의 성능도 비교하였다.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.57 no.6
• /
• pp.951-958
• /
• 2008

This paper describes development of hardware simulator for the PMSG wind power system, which was designed considering wind characteristic, blade characteristic and blade inertia compensation. The simulator consists of three major parts, such as wind turbine model using induction motor, PMSG generator, converter-inverter set. and control system. The turbine simulator generates torque and speed signals for a specific wind turbine with respect to given wind speed. This torque and speed signals are scaled down to fit the input of 2kW PMSG. The PMSG-side converter operates to track the maximum power point, and the grid-side inverter controls the active and reactive power supplied to the grid. The operational feasibility was verified by computer simulations with PSCAD/EMTDC, and the implementation feasibility was confirmed through experimental works with a hardware set-up.

• The Transactions of the Korea Information Processing Society
• /
• v.2 no.4
• /
• pp.561-566
• /
• 1995

In the degraded mode, there is frequency-misalignment between the node clocks in a synchronous network. Therefore the phase differences between node clocks fluctuate greatly. To keep the phase difference under allowable level the pointer adjustment technique is used Unfortunately these processes cause an inherent pointer adjustment jitter, that accumulates in a chain of pointer adjustment systems. To analyze the jitter, computer simulation is carried and the results is compared with experimental jitter values.