• Journal of the Korea institute for structural maintenance and inspection
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• v.20 no.3
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• pp.111-121
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• 2016

In this study, measurements were conducted by image processing to do an in-depth evaluation of strain of rebar in a uniaxial tension test. The distribution of strain and the necking region were evaluated. The image processing is used to analyze the color information of a colored image, so that the parts consistent with desired targets can be distinguished from the other parts. After this process, the image was converted to a binary one. Centroids of each target region are obtained in the binary images. After repeating such process on the images from starting point to the finishing point of the test, elongation between targets is calculated based on the centroid of each target. The tensile test were conducted on grade 60 #7(D22) and #9(D29) rebars fabricated in accordance with ASTM A615 standards. Strain results from image processing were compared to the results from a conventional strain gauge, in order to see the validity of the image processing. With the image processing, the measuring was possible in not only the initial elastic region but also the necking region of more than 0.5(50%) strain. The image processing can remove the measuring limits as long as the targets can be video recorded. It also can measure strain at various spots because the targets can easily be attached and detached. Thus it is concluded that the image processing helps overcome limits in strain measuring and will be used in various ways.

• Journal of Korean Philosophical Society
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• v.139
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• pp.1-21
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• 2016

To quickly and accurately grasp the consistency and the true/false of sentence description, we may require the help of a computer. It is thus necessary to research and quickly and accurately grasp the consistency and the true/false of sentence description by computer processing techniques. This requires research and planning for the whole study, namely a plan for the necessary tables and those of processing, and development of the table of the five logic rules. In future research, it will be necessary to create and develop the table of ten basic inference rules and the eleven kinds of derived inference rules, and it will be necessary to build a DB of those tables and the computer processing of sentence logic using server programming JSP and client programming JAVA over its foundation. In this paper we present the overall research plan in referring to the logic operation table, dividing the logic and inference rules, and preparing the listed process sequentially by dividing the combination of their use. These jobs are shown as a variable table and a symbol table, and in subsequent studies, will input a processing table and will perform the utilization of server programming JSP, client programming JAVA in the construction of subject/predicate part activated DB, and will prove the true/false of a sentence. In considering the table prepared in chapter 2 as a guide, chapter 3 shows the creation and development of the table of the five logic rules, i.e, The Rule of Double Negation, De Morgan's Rule, The Commutative Rule, The Associative Rule, and The Distributive Rule. These five logic rules are used in Propositional Calculus, Sentential Logic Calculus, and Statement Logic Calculus for sentence logic.

• Digital Contents
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• no.3 s.58
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• pp.38-45
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• 1998

지난 수년간 온라인 트랜잭션 프로세싱은 지속적으로 사용자들의 관심을 유발시켜 왔다. 그러나 아직까지도 진정한 OLTP 시스템 전문가를 찾기는 쉽지 않은 실정이며, 그 개념에 대해서도 이견이 분분하다. 또한 최근에는 OLTP 시스템을 데이터웨어하우스와 접목. 그 기능을 재정의하는 논의도 재개되고 있다. 성공적인 OLTP 시스템 구축 요령과 향후의 OLTP의 미래에 대해 전망해본다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.12B
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• pp.1244-1250
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• 2010

This paper presents a detection and ranging algorithm for a high-speed targets in the high PRF radar. We show, unlike the conventional methods, it firstly estimates Doppler frequency with a quasi-periodic pulse train prior to range processing. The estimated Doppler frequency can compensate the phase error enbeded in the received signal, which makes the signal integrated coherently in the range direction and localizes the target's signiture in low SNR. We present the derivation of the proposed algorithm and discuss how the system parameters such as the range/Doppler sampling condition, processing time and Doppler estimation error affect the performance of the proposed algorithm, which is verified by simulations.

• Journal of Platform Technology
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• v.12 no.2
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• pp.58-63
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• 2024

CNNs tend to take a long time to learn and consume a lot of power due to lack of system resources with many data processing units when there are repetitive handles that do not have high performance in the image field. In this paper, we propose a handling method based on a low-power bus that can increase the exchange rate of multipliers and multiplicands within the convolution mixer, which is a tendency activity that occurs when a convolution mixer has multiplication, which is the core element of combination. Convolutional neural networks have proprietary low-power shared processor support and the design was implemented on an Intel DE1-SoC FPGA board using Verilog-HDL. The experiments validated the performance by comparing it with the exchange rate of the multiplier originally proposed by Shen on MNIST's numeric image database.

• KIPS Transactions on Computer and Communication Systems
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• v.4 no.6
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• pp.177-184
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• 2015

This paper proposes a minimum-power scheduling scheme of real-time parallel tasks while meeting deadlines of the real-time tasks on DVFS-enabled multicore processors. The proposed scheme first finds a floating number of processing cores to each task so that the computation load of all processing cores would be equalized. Next the scheme translates the found floating number of cores into a natural number of cores while maintaining the computation load of all cores unchanged, and allocates the translated natural number of cores to the execution of each task. The scheme is designed to minimize the power consumption of the frequency-sharing multicore processor operating with the same processing speed at an instant time. Evaluation shows that the scheme saves up to 38% power consumption of the previous method.

• KIISE Transactions on Computing Practices
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• v.23 no.8
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• pp.473-480
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• 2017

In recent years, semiconductor-based storage devices such as flash memory (SSDs) have been developed to high performance. In addition, a trend has been observed of optimally utilizing resources such as the central processing unit (CPU) and memory of the internal controller in the storage device according to the needs of the application. This concept is called In-Storage Processing (ISP). In a storage device equipped with the ISP function, it is possible to process part of the operation executed on the host system, thus reducing the load on the host. Moreover, since the data is processed in the storage device, the data transferred to the host are reduced. In this paper, we propose a method to optimize graph query processing by utilizing these ISP functions, and show that the optimized graph processing method improves the performance of the graph 500 benchmark by up to 20%.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1141-1144
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• 2011

Range walk has been a major problem in achieving correct Doppler processing. This frequently occurs when range variation is severe just like in a bistatic radar or in high speed target scenario. This paper presents a range walk compensated range-Doppler processing algorithm applicable to the bistatic radar. In order for the compensation, a range-domain interpolation is applied for range compressed signal so that Doppler processing is performed along the evenly time-spaced range bins that contain target returns. Under a bistatic radar scenario, the proposed algorithm including a range domain pulse compression is mathematically described. Finally, the validity of the algorithm is demonstrated by simulation results showing the superiority of a SCDP(Squint Cross-range Doppler Processing) over an uncompensated Doppler processing.

• Journal of the Korea Society of Computer and Information
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• v.19 no.12
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• pp.1-10
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• 2014

This paper proposes a scheduling scheme that enhances power consumption efficiency of periodic real-time tasks using DVFS and power-shut-down mechanisms while meeting their deadlines on multicore processors. The proposed scheme is suitable for dependent multicore processors in which processing cores have an identical speed at an instant, and resolves the load unbalance of processing cores by exploiting parallel processing because the load unbalance causes inefficient power consumption in previous methods. Also the scheme activates a part of processing cores and turns off the power of unused cores. The number of activated processing cores is determined through mathematical analysis. Evaluation experiments show that the proposed scheme saves up to 77% power consumption of the previous method.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2010.11a
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• pp.171-174
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• 2010

무선 통신 환경에서 간섭과 잡음으로 인한 채널 추정 오류는 데이터 검출을 위한 등화 성능을 현저하게 저하시킨다. 포스트 프로세싱은 채널 추정 이후에 이러한 추정 오류를 줄이기 위한 작업이며, 여기서는 소수의 채널 계수만이 무선 채널의 다중 경로에 의한 신호 성분을 갖는 무선 채널의 특성을 이용하여 신호 성분을 포함하지 않은 계수를 선별하고 이를 제거함으로써 채널 추정 오류를 줄이는 방법을 위한 순환 알고리즘을 제안한다. 기존 알고리즘은 잡음 분산을 기준으로 문턱값을 결정하고, 그 문턱 값보다 작은 계수는 신호성분을 포함하지 않는다고 간주하여 이를 제거하였다. 제안된 순환 알고리즘은 잡음 분산의 추정치를 반복이 진행됨에 따라 갱신하여 이를 기준으로 구한 문턱값을 이용한 포스트 프로세싱을 반복함으로써 채널 추정 성능을 개선시킨다. 제안된 방법은 기존의 방법과 유사한 복잡도를 갖는 반복 횟수를 적용하는 경우에 월등히 성능이 개선되며, 특히 반복 횟수를 조절함으로써 처리 시간과 채널 추정 성능을 최적화할 수 있는 유연성을 갖고 있다.