• Proceedings of the IEEK Conference
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• 2003.07d
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• pp.1669-1672
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• 2003

본 논문은 공유자원과 태스크 활용률을 고려한 저전력 스케줄링 알고리즘을 제안한다. 기존에 공유자원을 고려한 논문에서는 선점 영역에서 최악실행시간만을 고려하였기 때문에 높은 전압을 계속 유지하여 전력 소비가 많고, 태스크들이 조기 종료할 경우 남는 시간을 활용하지 못하는 문제가 있다. 본 논문에서는 선점 영역에서는 태스크들이 조기 종료하는 경우 남는 시간을 이용하여 태스크 활용률을 갱신하고 다음 태스크에게 더 낮은 주파수와 전압을 인가하여 전력 소모를 줄이는 방법을 사용하고, 비 선점 영역에서는 최악 실행시간을 기준으로 한 최대 태스크 활용률을 이용하여 우선 순위 높은 태스크의 지연 시간을 최소화 시켜주는 방법을 제안한다. 실험 결과는 Arm8 테스트 벤치마크 데이터를 통해 기존의 알고리즘과 제안된 알고리즘의 전력 소모를 비교했을 때 6％의 파워 소모 감소를 보였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39B no.2
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• pp.53-60
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• 2014

The recent electric power shortage has led to the vigorous study for energy conservation in the many different fields. In this paper, cell zooming technology, which can reduce the energy loss at the base stations controlling the transmission power of the stations depending on the changing trffic density for reduce energy consumption that occurs when there is little or no trffic in the service area, is proposed and energy conservation is confirmed by comparing base stations' service scenario depending on traffic change.

• Proceedings of the Korean Information Science Society Conference
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• 2006.10d
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• pp.625-630
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• 2006

Zigbee 센서 네트워크에서는 multihop 전송을 위하여 tree topology와 beacon-enabled 네트워크 구성을 갖는다. 이러한 multihop beaconing 네트워크의 목적은 routing 노드들에게 Sleep할 기회를 주어 파워의 소모를 줄이고자 하는 데 있다. 파워의 소모를 줄이고 beacon 전송시의 충돌을 방지하기 위하여 beacon 전송 스케줄링이 필요한데 본 논문은 multihop을 지원하고 에너지 효율에 효과적인 beacon 전송 스케줄링 알고리즘과 이를 바탕으로 에너지 효율적인 라우팅 기법을 제안한다. 본 제안은 Zigbee coordinator의 beacon interval(BI)이 결정되면 네트워크 내의 beacon을 전송하는 모든 노드들은 Zigbee coordinator의 BI를 알고 모든 노드의 superframe duration(SD)은 동일하다고 가정한다. 이러한 가정하에서 beacon을 전송하는 노드들이 Zigbee coordinator의 BI 구간 중 항상 정해진 시간에 자신의 beacon을 전송한다면 beacon의 충돌을 막을 수 있음을 보여 준다. 또한 노드들이 서로의 beacon 전송 시간을 알 수 있기 때문에 목적지 노드의 beacon을 tracking하지 않고도 목적지 노드가 active 되는 시점에 패킷을 전송하면 에너지 측면에서 좀 더 효율적인 라우팅 기반을 제공한다는 것을 보여 준다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11C
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• pp.1052-1061
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• 2003

This paper proposes a novel normalization scheme in the state metric calculation unit for the Block-wise MAP Turbo decoder. The proposed scheme subtracts one of four metrics from the state metrics in a trellis stage and shifts, if necessary, those metrics for normalization. The proposed architecture can reduce power consumption and memory requirement by reducing the number of the state metrics by one in a trellis stage in the Block-wise MAP decoder which requires an intensive state metric calculations. Simulation results show that dynamic power has been reduced by 17.9% and area has been reduced by 6.6% in the Turbo decoder employing the proposed normalization scheme, when compared to the conventional Block-wise MAP Turbo decoders.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.2
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• pp.82-92
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• 2008

Recently, many digital signal processing(DSP) applications such as H.264, CDMA and MP3 are predominant tasks for modern high-performance portable devices. These applications are generally computation-intensive, and therefore, require quite complicated accelerator units to improve performance. Designing such specialized, yet fixed DSP accelerators takes lots of effort. Therefore, DSPs with multiple accelerators often have a very poor time-to-market and an unacceptable area overhead. To avoid such long time-to-market and high-area overhead, dynamically reconfigurable DSP architectures have attracted a lot of attention lately. Dynamically reconfigurable DSPs typically employ a multi-functional DSP accelerator which executes similar, yet different multiple kinds of computations for DSP applications. With this type of dynamically reconfigurable DSP accelerators, the time to market reduces significantly. However, integrating multiple functionalities into a single IP often results in excessive control and area overhead. Therefore, delay and power consumption often turn out to be quite excessive. In this thesis, to reduce power consumption of dynamically reconfigurable IPs, we propose a novel fine-grained clock gating scheme, and to reduce size of dynamically reconfigurable IPs, we propose a compact multiplier-less multiplication unit where shifters and adders carry out constant multiplications.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.6
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• pp.55-66
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• 2016

Power gating is one of effective techniques for reducing leakage current in semiconductor chip. However, power gating cell (PGC) which is used to switch the power source causes performance degradation and the associated reliability problem by increasing IR drop. However, the newly raised problem caused by different scaling properties between gates and metal wires demands additional considerations in power gating design. In this paper, we propose a robust cell placement based power gating design method for reducing the area for power gating cell and metal routing thus to meet IR drop requirement. Experimental results by applying the proposed techniques on the application processor for smartphone fabricated in 28nm CMOS process show that power gating cell area is reduced by 16.16% and maximum IR drop value is also decreased by 8.49% compared to existing power gating cell placement techniques.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.9
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• pp.944-949
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• 2003

In this paper, the double balance mixer(DBM) for Ku-band LNB using InGaP/GaAs HBT process is suggested for the characteristics of low DC power consumption, low noise figure, low intermodulation distortion and wide dynamic range. The 5 dB conversion gain, 14 dB NF, bandwidth 17.9 GHz and 50.34 dBc IMD are obtained under RF input power of -23 dBm, with bias condition as 3 V and 16 mA. The linearity of InGaP/GaAs HBT, the broad band input matching scheme and the optimization of bias point result in the low IMD, the broad bandwidth and the low power consumption characteristics.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.4A
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• pp.450-457
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• 2008

One of very essential techniques for enlarging lifetime of energy-constrained wireless personal area network (WPAN) devices is energy-efficient transmission technique. If the WPAN is operated based on a TDMA protocol, the satisfaction of QoS requirements at each allocated time slot is another important factor to be considered. We therefore propose an energy-efficient transmission scheme for WPANs operating with a contention-free medium access protocol such as TDMA, as well as satisfying QoS requirement. The proposed algorithm determines the optimum combination of transmit power, physical data rate and fragment size required to simultaneously minimize the energy consumption and satisfy the required QoS in each assigned time duration, considering all the possible energy-minimization related parameters. The proposed algorithm demonstrated the improved performance results in terms of throughput and energy consumption via computer simulation.

• Proceedings of the Korean Information Science Society Conference
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• 2008.06a
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• pp.189-194
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• 2008

센서 노드의 여러 기능들 중 통신이 가장 많은 에너지를 소비하며, 특히 센서 노드의 RF 트랜스시버가 송수신 모드일 때 가장 많은 에너지가 소비된다. 하지만 RF 트랜스시버는 대부분 시간 동안 대기 모드 상태에 있기 때문에 대기 모드 상태에서 소모되는 에너지 총합은 송수신 모드에서의 총 에너지 소비량에 근접한다. 따라서 대기 모드 시간을 최소화하는 것이 에너지 효율 면에서 중요하다고 할 수 있다. 본 논문에서는 다중 경로를 이용하여 대기 모드 시간을 줄이는 분산 파워 스케줄링 기법을 제안한다. 제안하는 방법은 기존의 MAC 프로토콜과 함께 동작하여 에너지 효율성을 증대시킬 뿐만 아니라, 분산 및 비동기적 방식으로 동작하기 때문에 네트워크 위상 변화에 쉽게 대응할 수 있다는 장점이 있다.

• KIPS Transactions on Computer and Communication Systems
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• v.2 no.8
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• pp.343-348
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• 2013

We proposes a power-aware fixed-priority real-time scheduling algorithm for multimedia service, called static voltage scaling algorithm with multi-granularity resource reservation (STATIC-MULTIRSV). The multi-granularity resource reservation was introduced to deliver higher system utilization and better temporal isolation than the traditional approaches in [2]. Based on this, our STATIC-MULTIRSV is designed to reduce the power consumptions while guaranteeing that all I-frames of each video stream meet their deadlines. We implemented the proposed algorithm on top of ChronOS Real-time Linux [6]. We experimentally compared STATIC-MULTIRSV with other existing methods which showed that STATIC-MULTIRSV reduce power consumption by maximum 15% compared to its experimental counterparts.