• Proceedings of the Korea Information Processing Society Conference
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• 2001.10a
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• pp.813-816
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• 2001

본 논문에서 제안한 알고리듬은 동영상의 한 프레임내에서 계산할 화소를 적응적으로 샘플링하여 전체 계산량을 감소시키면서도, 우수한 성능을 나타낸다. 동영상의 움직임 추정에 있어서, 전역 탐색 블록 정합은 최적의 성능을 나타내지만, 많은 계산량을 갖는 단점이 있기 때문에 계산량을 줄이기 위한 많은 알고리듬이 발표되었다. 본 알고리듬은 한 프레임내에서 영상이 복잡한 부분에서는 많은 수의 화소를 정합에 이용하며, 단순한 부분에서는 적은 수의 화소를 샘플링 하여 보다 적은 계산량으로 움직임 벡터를 산출한다. 제안된 알고리듬은 전역 탐색 블록 정합 알고리듬에 대해서 연산량을 31.52%로 줄였으며, 97.76%의 PSNR 을 보여주었다. 이는 종래의 부분 탐색 알고리듬들에 비해 뒤지지 않는 성능을 나타낸다.

• Journal of Broadcast Engineering
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• v.12 no.5
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• pp.503-515
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• 2007

A new fast motion estimation algorithm is presented in this paper. The algorithm, named Enhanced Cross-Diamond Search (ECDS), is based on the Diamond Search (DS) algorithm. The DS algorithm, even though faster than the most well-known algorithms, was found not to be very robust in terms of objective and subjective qualities for several sequences and the algorithm searches unnecessary candidate blocks. We propose a novel ECDS algorithm using a small cross search as the initial step, and large/small DS patterns as subsequent steps for fast block motion estimation. Experimental results show that the ECDS is much more robust, provides a faster searching speed, and smaller distortions than other popular fast block-matching algorithms.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.9
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• pp.1-10
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• 1998

This paper is to propose an algorithm named as DYSAC to find the critical path(the longest sensitizable path) in a large digital circuit, whose purpose is to reduce the time to find critical path and to find critical paths of the circuits for which the previous methods could not find one. Also a set of path sensitization criteria named as DYPSEC is proposed, which is used to select a path from input to the output inside the DYSAC. The DYSAC consists of two sub-algorithms; the level assignment algorithm to assign a level to each node and the critical path selection algorithm to select the sensitizable path. The proposed algorithm was implemented with C-language on SUN Sparc and applied to the ISCAS'85 benchmark circuits to make sure if it works correctly and finds the correct critical path. Also, the results from the experiments were compared to the results from the previous works. The comparison items were the ability to find the critical path and the speed, in both of which the proposed algorithm in this paper shows better results than others.

• Journal of Korea Society of Industrial Information Systems
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• v.10 no.4
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• pp.16-25
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• 2005

In this paper, we proposed a novel algorithm combined simulated annealing and genetic algorithms for designing optimal binary phase computer generated hologram. In the process of genetic algorithm searching by block units, after the crossover and mutation operations, simulated annealing algorithm searching by pixel units is inserted. So, the performance of BPCGH was improved. Computer simulations show that the proposed combined iterative algorithm has better performance than the simulated annealing algorithm in terms of diffraction efficiency

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.11
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• pp.1566-1573
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• 2021

Rendezvous is a process that assists nodes in a Cognitive Radio Networks (CRNs) to discover each other. In CRNs where a common control channel is unknown and a number of channels are given, it is important how two nodes find each other in a known search region. In this paper, I have proposed and analyzed a channel hopping sequence using Sidel'nikov sequence by which each node visits an available number of channels. I analyze the expected time to-rendezvous (TTR) mathematically. I also verify the Rendezvous performance of proposed sequence in the view of TTR under 2 user environment compared with JS algorithm and GOS algorithm. The Rendezvous performance of proposed sequence is much better than GOS algorithm and similar with JS algorithm. But when M is much smaller than p, the performance of proposed sequence is better than JS algorithm.

• Journal of Broadcast Engineering
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• v.23 no.1
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• pp.138-145
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• 2018

In this paper, we propose a new motion estimation algorithm for frame rate up-conversion. The proposed algorithm uses the variance of errors in addition to SAD in motion estimation to find more accurate motion vectors. Then, it decides which motion vectors are wrong using the variance of neighbor motion vectors and the variance between current motion vector and neighbor's average motion vector. Next, incorrect motion vectors are corrected by weighted sum of eight neighbor motion vectors. Additionally, we propose adaptive search range algorithm, so we can find more accurate motion vectors and reduce computational complexity at the same time. As a result, proposed algorithm improves the average peak signal-to-noise ratio and structural similarity up to 1.44 dB and 0.129, respectively, compared with previous algorithms.

• Proceedings of the Acoustical Society of Korea Conference
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• 1998.08a
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• pp.169-173
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• 1998

최근 우리 나라 CDMA 디지털 셀룰라 시스템에서 채택한 EVRC 의 고정 코드북 탐색 과정에서의 계산량 감소 알고리듬을 제안한다. 고정 코드북 탐색 과정에서 펄스 위치에 제한을 두어 기존의 방법보다 가능한 펄스 위치의 조합을 줄인다. 또한 ETIR 방법을 적용하여 고정 코드북 연산량을 개선시킨다. 주/객관적 음질 평가 방법을 수행한 결과, 제안된 방법이 기존의 방법에 비해 음질의 저하가 없음을 확인하였다.

• Journal of Korean Society of Transportation
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• v.22 no.4 s.75
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• pp.135-146
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• 2004

For improving the effectiveness of travel information, some rational paths are needed to provide them to users driving in real road network. To meet it, k-shortest path algorithms have been used in general. Although the k-shortest path algorithm can provide several alternative paths, it has inherent limit of heavy overlapping among derived paths, which nay lead to incorrect travel information to the users. In case of considering the network consisting of several turn prohibitions popularly adopted in real world network, it makes difficult for the traditional network optimization technique to deal with. Banned and penalized turns are not described appropriately for in the standard node/link method of network definition with intersections represented by nodes only. Such problem could be solved by expansion technique adding extra links and nodes to the network for describing turn penalties, but this method could not apply to large networks as well as dynamic case due to its overwhelming additional works. This paper proposes a link-based shortest path algorithm for the travel information in real road network where exists turn prohibitions. It enables to provide efficient alternative paths under consideration of overlaps among paths. The algorithm builds each path based on the degree of overlapping between each path and stops building new path when the degree of overlapping ratio exceeds its criterion. Because proposed algorithm builds the shortest path based on the link-end cost instead or node cost and constructs path between origin and destination by link connection, the network expansion does not require. Thus it is possible to save the time or network modification and of computer running. Some numerical examples are used for test of the model proposed in the paper.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.1B
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• pp.128-140
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• 2000

In this paper, we propose a fast block matching algorithm using the mean absolute error (MAE) of neighbor search point and search region reduction. The proposed algorithm is composed of two stages. At the first stage,the search region is divided into nonoverlapped 3$\times$3 areas and MAE of the center point of each area iscalculated. The minimum MAE value of all the calculated MAE's is determined as reference MAE. At thesecond stage, because the possibility that final motion vector exist near the position of reference MAE is veryhigh, we use smaller search region than first stage, And, using the MAE of center point of each area, the lowerbound of rest search point of each area is calculated and block matching process is performed only at the searchpoints that the lower bound is smaller than reference MAE. By doing so, we can significantly reduce thecomputational complexity while keep the increasement of motion estimation error small.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.8
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• pp.2113-2119
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• 1998

The optimization problem of BDDs plays an improtant role in the area of logic synthesis and formal verification. Since the variable ordering has great impacts on the size and form of BDD, finding a good variable order is very important problem. In this paper, a new variable ordering scheme called incremental optimization algorithm is presented. The proposed algorithm reduces search space more than a half of that of the conventional sifting algorithm, and computing time has been greatly reduced withoug depreciating the performance. Moreover, the incremental optimization algorithm is very simple than other variable reordering algorithms including the sifting algorithm. The proposed algorithm has been implemented and the efficiency has been show using may benchmark circuits.