• Title/Summary/Keyword: 코어크기

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Micron-Sized Hollow Plastic Pigment (마이크론 크기의 중공 유기 안료)

  • Choi, Gwang-Sik;Kim, Yang-Soo;Jung, Hoon-Sang;Jang, Seo-Won;Kim, Nam-Seon
    • Polymer(Korea)
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    • v.33 no.5
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    • pp.463-468
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    • 2009
  • Syntheses of monodisperse and micron-sized hollow plastic pigment (HPP) were carried out through the core-shell reaction. The effects of the reaction parameters, such as the particle size, molecular weight, the swelling time, agitation rate, and the solid contect were investigated. This micron-sized HPP could be made by using the alkali soluble core with at least bigger than 200 nm size. To obtain a higher opacity ratio, the swelling time and molecular weight of the core should be controlled. The agitation rate affected the particle's morphology. To prevent the shell destruction, the agitation rate must be sufficiently low in case of the syntheses of micron-sized HPP. In this study, micron-sized HPP exhibiting the high hiding power and narrow particle distribution could be obtained.

Analysis on the Performance Impact of Partitioned LLC for Heterogeneous Multicore Processors (이종 멀티코어 프로세서에서 분할된 공유 LLC가 성능에 미치는 영향 분석)

  • Moon, Min Goo;Kim, Cheol Hong
    • The Journal of Korean Institute of Next Generation Computing
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    • v.15 no.2
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    • pp.39-49
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    • 2019
  • Recently, CPU-GPU integrated heterogeneous multicore processors have been widely used for improving the performance of computing systems. Heterogeneous multicore processors integrate CPUs and GPUs on a single chip where CPUs and GPUs share the LLC(Last Level Cache). This causes a serious cache contention problem inside the processor, resulting in significant performance degradation. In this paper, we propose the partitioned LLC architecture to solve the cache contention problem in heterogeneous multicore processors. We analyze the performance impact varying the LLC size of CPUs and GPUs, respectively. According to our simulation results, the bigger the LLC size of the CPU, the CPU performance improves by up to 21%. However, the GPU shows negligible performance difference when the assigned LLC size increases. In other words, the GPU is less likely to lose the performance when the LLC size decreases. Because the performance degradation due to the LLC size reduction in GPU is much smaller than the performance improvement due to the increase of the LLC size of the CPU, the overall performance of heterogeneous multicore processors is expected to be improved by applying partitioned LLC to CPUs and GPUs. In addition, if we develop a memory management technique that can maximize the performance of each core in the future, we can greatly improve the performance of heterogeneous multicore processors.

Performance Comparison of Tilera Many-core and x86-64 Multi-core Systems (Tilera 다중코어와 x86-64 멀티코어 시스템의 성능 비교)

  • Choi, HeeSeok;Lyoo, TaeMuk;Park, JiSu;Jung, Daeyong;Lim, JongBeom;Lee, Jungha;Suh, Teaweon;Yu, Heonchang
    • Proceedings of the Korea Information Processing Society Conference
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    • 2013.05a
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    • pp.102-105
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    • 2013
  • 최근 멀티코어 시스템은 컴퓨터의 성능을 향상시키기 위해 더 많은 수의 코어를 연결시키는 다중코어 시스템으로 발전하고 있다. 그러나 멀티코어 시스템은 사용하는 코어의 아키텍처 구조와 개수에 따라 성능 차이가 발생한다. 이에, 본 논문에서는 코어의 아키텍처 구조와 코어의 개수가 성능에 미치는 영향을 분석하기 위해 Tilera의 다중코어 시스템인 Tile-Gx36, TilePro64와 Intel의 x86-64 멀티코어 시스템인 Core i5의 성능을 비교하였다. 코어의 사용률이 늘어남에 따른 성능차이를 알아보기 위해 벤치마크 프로그램인 SPEC CPU 2006을 이용하여 각 시스템 내 단일코어의 성능을 측정하고, OpenMP 벤치마크 프로그램을 이용하여 시스템의 모든 코어를 사용했을 때의 입력 데이터 크기에 따른 성능을 측정하였다. 실험 결과, 단일코어에서의 성능은 정수형 데이터를 사용하여 측정하였을 경우 Core i5가 Tile-Gx36보다 약 87%, 실수형 데이터를 사용하여 측정하였을 경우 약 94% 더 빠른 것으로 나타났다. 그러나 코어 전체를 이용한 성능 결과에서는 정수형 배열 크기가 이상일 경우 Tile-Gx36 시스템의 처리 속도가 Core i5 시스템 보다 평균적으로 약 7.6배 향상됨을 확인할 수 있었다. 따라서 Tilera의 다중코어 시스템은 클럭 속도와 아키텍처 구조의 영향으로 단일코어의 성능은 떨어지나, 병렬 처리를 이용한 고속연산에서는 성능이 향상된다고 할 수 있다.

Performance Study of Multi-core In-Order Superscalar Processor Architecture (멀티코어 순차 수퍼스칼라 프로세서의 성능 연구)

  • Lee, Jongbok
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.12 no.5
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    • pp.123-128
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    • 2012
  • In order to overcome the hardware complexity and performance limit problems, recently the multi-core architecture has been prevalent. For hardware simplicity, usually RISC processor is adopted as the unit core processor. However, if the performance of unit core processor is enhanced, the overall performance of the multi-core processor architecture can be further enhanced. In this paper, in-order superscalar processor is utilized as the core for the multi-core processor architecture. Using SPEC 2000 benchmarks as input, the trace-driven simulation has been performed for the number of superscalar cores between 2 and 16 and the window size of 4 to 16 extensively. As a result, the 16-core superscalar processor for the window size of 16 results in 8.4 times speed up over the single core superscalar processor. When compared with the same number of cores, the multi-core superscalar processor performance doubles that of the multi-core RISC processor.

Preparation of Polystyrene-Polyetherimide Core-Shell Particles by Dispersion Polymerization (분산중합에 의한 폴리스티렌-폴리에테르이미드 코어-셀 입자의 합성)

  • Ahn, Byung Hyun
    • Applied Chemistry for Engineering
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    • v.25 no.5
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    • pp.526-530
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    • 2014
  • Polystyrene-poly(etheramic acid) core-shell particles were prepared by dispersion polymerization of styrene using poly(etheramic acid) obtained by the reaction of 2,2'-bis[4-(3,4-dicarboxyphenoxy) phenyl]propane dianhydride and 3,5-diamniobenzoic acid as a stabilizer. 4-Vinylbenzyltrimethylammonium chloride was used as a comonomer to increase the binding efficiency of poly(etheramic acid). When the ethanol-water mixture (7 : 3) was used as a reaction medium, particles were stabilized well and the size distribution of particles was fairly narrow. The particle size increased with the amount of styrene. The particles polymerized in the dimethylformamide-water mixture had a broad size range. Polystyrene-poly(etheramic acid) core-shell particles were transformed to polystyrene-polyetherimide core-shell particles by the chemical imidization of shells.

Physical Characteristics of Reservoir Sediment Cores with Depth (저수지 퇴적토 코어의 깊이에 따른 물리적 특성 변화)

  • Kim, Heung-Tae;Kim, Jae-Geun;Youn, Ho-Joong
    • Journal of Wetlands Research
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    • v.12 no.3
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    • pp.57-65
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    • 2010
  • This study was conducted to present primary data on the change of the physical characteristics of reservoir sediments for understanding the sedimentation. The records of the annual summation of the precipitation of >50mm per day (AP50) were compared with changes of bulk density, organic matter, mean grain-size, and sand ratio in sediment cores sampled from three reservoirs without dredging record. Reservoir sediments, characterized by mineral soil, contained organic matters originated from the debris of terrestrial plants, and changes of organic matter were related to changes of grain-size flowing into reservoirs when sediments of fine sandy loam showed 10% of organic matter contents. Rapid changes of grain-size and sand ratio in the sediment cores were associated with the increase and decrease of precipitation, and fluctuation of water level and water flow in reservoirs might have influenced on the formation of sediments in reservoirs. Records of AP50 suggested that sediments could accumulate more than about 30 within the short period of 10 years. The accumulated sediments in a short time can reflect the effect of natural and anthropogenic events on the physical characteristics of sediments.

Precision Grinding System for Micro Core-pin (마이크로 코어 핀 정밀 연삭 시스템)

  • Yang, Ji-Kyung;Lee, In-Cheol;Kang, Dong-Seong;Han, Bong-Seok;Han, Yu-Jin;Lee, Jung-Woo;Song, Ki-Hyeok
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.18 no.4
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    • pp.50-57
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    • 2017
  • In the injection molding process, a core that builds a space for a product is installed at the internal place in the mold and fabricated as the frame of the mold. In this make up, the fabricating partial form of the mold at a pin is a core pin. The core pin is finer because an injection mold produces miniaturization and integration. On the other hand, when the core is manufactured using the existing centerless grinder, it generates vibrations because of the lack of a fixed zig for a micro size workpiece. For this reason, an existing centerless grinder without a micron size fixed zig, makes a defective product due to vibration and deformation. In this study, a compact grinding system that can be installed using an existing centerless grinder was fabricated to make a micro size core pin. Using the compact grinding system, grinding experiment for core pin was carried out. The performance of the system was confirmed by measuring the surface roughness, roundness, and cylindricity.

Deformation and Fracture Analysis of Honeycomb Sandwich Composites under Bending Loading (굽힘 하중을 받는 하니컴 샌드위치 복합재료의 변형 및 파괴 해석)

  • Kim Hyoung-Gu;Choi Nak-Sam
    • Composites Research
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    • v.18 no.1
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    • pp.30-37
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    • 2005
  • The bending strength characteristics and local deformation behaviors of honeycomb sandwich composites were investigated using three-point bending experiment and finite element simulation with a real model of honeycomb core. Two kinds of cell sizes of honeycomb core, two kinds of skin layer thicknesses, perfect bonding specimen as well as initial delamination specimen were used for analysis of stress and deformation behaviors of honeycomb sandwich beams. Various failure modes such as skin layer yielding, interfacial delamination, core shear deformation and local buckling were considered. Its simulation results were very comparable to the experimental ones. Consequently, cell size of honeycomb core and skin layer thickness had dominant effects on the bending strength and deformation behaviors of honeycomb sandwich composites. Specimens of large core cell size and thin skin layer showed that bending strength decreased by $30\~68\%$.

8×8 HEVC Inverse Core Transform Architecture Using Multiplier Reuse (곱셈기를 재사용하는 8×8 HEVC 코어 역변환기 설계)

  • Lee, Jong-Bae;Lee, Seongsoo
    • Journal of IKEEE
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    • v.17 no.4
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    • pp.570-578
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    • 2013
  • This paper proposed an $8{\times}8$ HEVC inverse core transform architecture reusing multipliers. In HEVC core transform, processing of lower size block is identical with even part of upper size block. So an $8{\times}8$ core transform architecture can process both $8{\times}8$ and $4{\times}4$ core transforms. However, when $8{\times}8$ core transform architecture is exploited, frame processing time doubles in $4{\times}4$ core transform, since $8{\times}8$ and $4{\times}4$ core transforms concurrently process 8 and 4 pixels, respectively. In this paper, a novel inverse core transform architecture is proposed based on multiplier reuse. It runs as an $8{\times}8$ inverse core transformer or two $4{\times}4$ inverse core transformer. Its frame processing time is same in $8{\times}8$ and $4{\times}4$ core transforms, and reduces gate counts by 12%.

Performance evaluation of mobile multicore devices on threading in converting JPEG to animated GIF (JPEG을 Animated GIF로 변환하는 과정에서 스레딩에 따른 멀티코어 모바일 디바이스의 성능 평가)

  • Woo, Hosung;Kim, Kangseok;Kim, Jai-Hoon
    • Proceedings of the Korea Information Processing Society Conference
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    • 2013.05a
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    • pp.328-331
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    • 2013
  • 본 논문에서는 멀티코어 모바일 디바이스에서 최적의 스레드 구성을 측정하기 위해 이미지 코덱을 사용하여 다양한 환경에서 스레드 개수에 따른 인코딩 수행시간을 분석하였다. 인코딩은 Quantization을 사용하여 JPEG 파일들을 하나의 GIF 파일로 변환하는 기능을 수행하며, 듀얼코어와 쿼드코어 안에서 각각의 스레드 개수를 늘려가며 측정하였다. 듀얼코어에서는 스레드 4개였을 경우가 성능이 효율적이였으며, 쿼드 코어에서는 스레드 3개였을 경우가 성능이 효율적이였다. 분석 후 결론은 스레드 개수와 성능은 비례하는 것이 아니며 성능에 크게 영향을 미치지 않는 것으로 확인되었다. 코어와 I/O입출력의 성능 및 데이터 크기에 따라 적당한 스레드 개수를 정하여 사용하는 것이 효율적이다.