• Proceedings of the Korean Operations and Management Science Society Conference
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• 1995.09a
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• pp.189-199
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• 1995

내부점 방법에서는 개선 방향을 대칭 양정치 행렬로 이루어지는 선형시스템 의 해를 구해야 하고 단체법에서는 단체 승수나 진입열을 계산하는데 기저 행렬로 이루어지는 선형시스템을 풀게된다. 본 연구는 내부점 기법과 단체법 에서 나타나는 선형시스템을 QR분해를 통해 푸는 방법을 구현하고 이에 대 한 결과를 제시하였다. QR분해 방법으로는 Givens가 제시한 방법을 사용했 으며 단체법에서 rank-one 수정 방법을 사용하였다. QR분해를 적용한 단체 법의 경우는 상.하 분해를 단체법에 비해 많이 느리며 내부점 기법에 적용하 면 촐레스키 분해보다 2-8배 정도 수행시간이 더 소요되었다. 그러나 내부점 기법에서 QR분해 방법이 촐레스키 분해 방법에 비해 보다 수치적으로 보다 정확하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.2
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• pp.379-385
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• 2015

This paper proposes the hardware architecture of high performance ALF(Adaptive Loop Filter) for efficient filter coefficient estimation. In order to make the original image which has high resolution and high quality into highly compressed image effectively and also, subjective image quality into improved image, the ALF technique of HEVC performs a filtering by estimating filter coefficients using statistical characteristics of image. The proposed ALF hardware architecture is designed with a 2-step pipelined architecture for a reduction in performance cycle by analysing an operation relationship of Cholesky decomposition for the filter coefficient estimation. Also, in the operation process of the Cholesky decomposition, a square root operation is designed to reduce logic area, computation time and computation complexity by using the multiplexer, subtracter and comparator. The proposed hardware architecture is designed using Xilinx ISE 14.3 Vertex-7 XC7VCX485T FPGA device and can support 4K UHD@40fps in real time at a maximum operation frequency of 186MHz.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.295-298
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• 2014

In this paper, an efficient design of HEVC Adaptive Loop Filter(ALF) for filter coefficients estimation is proposed. The ALF performs Cholesky decomposition of $10{\times}10$ matrix iteratively to estimate filter coefficients. The Cholesky decomposition of the ALF consists of root and division operation which is difficult to implement in a hardware design because it needs to many computation rate and processing time due to floating-point unit operation of large values of the Maximum 30bit in a LCU($64{\times}64$). The proposed hardware architecture is implemented by designing a root operation based on Cholesky decomposition by using multiplexer, subtracter and comparator. In addition, The proposed hardware architecture of efficient and low computation rate is implemented by designing a pipeline architecture using characteristic operation steps of Cholesky decomposition. An implemented hardware is designed using Xilinx ISE 14.3 Vertex-6 XC6VCX240T FPGA device and can support a frame rate of 40 4K Ultra HD($4096{\times}2160$) frames per second at maximum operation frequency 150MHz.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 1999.04a
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• pp.311-312
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• 1999

• Journal of Korean Institute of Industrial Engineers
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• v.25 no.3
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• pp.290-297
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• 1999

In interior point methods for linear programming, we must solve a linear system with a symmetric positive definite matrix at every iteration, and Cholesky factorization is generally used to solve it. Therefore, if Cholesky factorization is not done successfully, many iterations are needed to find the optimal solution or we can not find it. We studied methods for improving the numerical stability of Cholesky factorization and the accuracy of the solution of the linear system.

• Journal of the Korean Operations Research and Management Science Society
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• v.28 no.1
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• pp.51-61
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• 2003

In the normal equations approach in which the ordering and factorization phases are separated, the factorization in the augmented system approach is computed dynamically. This means that in the augmented system the numerical factorization should be performed to obtain the non-zero structure of Cholesky factor L. This causes much time to set up the non-zero structure of Cholesky factor L. So, we present a method which can separate the ordering and numerical factorization in the augmented system. Experimental results show that the proposed method reduces the time for obtaining the non-zero structure of Cholesky factor L.