• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.42 no.2 s.332
• /
• pp.61-74
• /
• 2005

Digital Multimedia Broadcasting(DMB) is a reliable multi-service system for reception by mobile and portable receivers. DMB system allows interference-free reception under the conditions of multipath propagation and transmission errors using COFDM modulation scheme, simultaneously, needs powerful channel error's correction ability. Viterbi Decoder for DMB receiver uses punctured convolutional code and needs lots of computations for real-time operation. So, it is desired to design a high speed and low-power hardware scheme for Viterbi decoder. This paper proposes a combined add-compare-select(ACS) and path metric normalization(PMN) unit for computation power. The proposed PMN architecture reduces the problem of the critical path by applying fixed value for selection algorithm due to the comparison tree which has a weak point from structure with the high-speed operation. The proposed ACS uses the decomposition and the pre-computation technique for reducing the complicated degree of the adder, the comparator and multiplexer. According to a simulation result, reduction of area $3.78\%$, power consumption $12.22\%$, maximum gate delay $23.80\%$ occurred from punctured viterbi decoder for DMB system.

• Journal of the Korean Institute of Telematics and Electronics S
• /
• v.35S no.8
• /
• pp.1-11
• /
• 1998

One of the desired features for the realizations of high quality Information and Telecommunication services in future is "the Sensation of Reality". This will be achieved only with the visual communication based on the 3- dimensional (3-D) moving images. The main difficulties in realizing 3-D moving image communication are that there is no developed data transmission technology for the hugh amount of data involved in 3-D images and no established technologies for 3-D image recording and displaying in real time. The currently known stereoscopic imaging technologies can only present depth, no moving parallax, so they are not effective in creating the sensation of the reality without taking eye glasses. The more effective 3-D imaging technologies for achieving the sensation of reality are those based on the multiview 3-D images which provides the object image changes as the eyes move to different directions. In this paper, a multiview 3-D imaging system composed of 8 CCD cameras in a case, a RGB(Red, Green, Blue) beam projector, and a holographic screen is introduced. In this system, the 8 view images are recorded by the 8 CCD cameras and the images are transmitted to the beam projector in sequence by a signal converter. This signal converter converts each camera signal into 3 different color signals, i.e., RGB signals, combines each color signal from the 8 cameras into a serial signal train by multiplexing and drives the corresponding color channel of the beam projector to 480Hz frame rate. The beam projector projects images to the holographic screen through a LCD shutter. The LCD shutter consists of 8 LCD strips. The image of each LCD strip, created by the holographic screen, forms as sub-viewing zone. Since the ON period and sequence of the LCD strips are synchronized with those of the camera image sampling adn the beam projector image projection, the multiview 3-D moving images are viewed at the viewing zone.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.47 no.1
• /
• pp.9-16
• /
• 2010

Moving object detection is to detect foreground object different from background scene in a new incoming image frame and is an essential ingredient process in some image processing applications such as intelligent visual surveillance, HCI, object-based video compression and etc. Most of previous object detection algorithms are still computationally heavy so that it is difficult to develop real-time multi-channel moving object detection in a workstation or even one-channel real-time moving object detection in an embedded system using them. Foreground mask correction necessary for a more precise object detection is usually accomplished using morphological operations like opening and closing. Morphological operations are not computationally cheap and moreover, they are difficult to be rendered to run simultaneously with the subsequent connected component labeling routine since they need quite different type of processing from what the connected component labeling does. In this paper, we first devise a fast and precise foreground mask correction algorithm, "Neighbor Foreground Pixel Propagation (NFPP)" which utilizes neighbor pixel checking employed in the connected component labeling. Next, we propose a novel moving object detection method based on the devised foreground mask correction algorithm, NFPP where the connected component labeling routine can be executed simultaneously with the foreground mask correction. Through experiments, it is verified that the proposed moving object detection method shows more precise object detection and more than 4 times faster processing speed for a image frame and videos in the given the experiments than the previous moving object detection method using morphological operations.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.43 no.1 s.343
• /
• pp.111-120
• /
• 2006

In this paper, a node architecture of WDM metro network for connecting broadband access networks to converge wire/wireless networks. In consideration of the proposed node architecture and network requirements we proposed and evaluated medium access control protocols. We review WDM related technologies of sub-carrier multiplexing and optical components in order to resolve the bottleneck between optical backbone networks md access networks, and a access node architecture sharing common wavelength is introduced. Source-stripping (SS) MAC protocol Is evaluated under the proposed functional node architecture. DS+IS (Destination-Stripping and Source-Stripping) and DS+IS (Destination-Stripping and Intermediate-Stripping) MAC protocols are described to increase the slot-reuse factor which is low on SS MAC protocol. The key function of new MAC protocols regards the optical switch module of proposed node architecture and helps intermediate or source access nodes for dropping slots to destinations of different wavelength group. Thus, slot-reuse factor increases as the MAC protocols reduce the unnecessary ring-rotation of transferred slots. We use a numerical analysis to expect bandwidth efficiency and maximum throughput by slot-reuse factor Throughput network simulation, the verification of throughput, queuing delay, and transmission fairness are compared among MAC protocols.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.45 no.2
• /
• pp.81-89
• /
• 2008

Wideband speech, characterized by a bandwidth of about 7 kHz (50-7000 Hz), provides a substantial quality improvement in terms of naturalness and intelligibility. Although higher data rates are required, it has extended its application to audio and video conferencing, high-quality multimedia communications in mobile links or packet-switched transmissions, and digital AM broadcasting. In this paper, we present a new bandwidth-scalable coder for wideband speech and audio signals. The proposed coder spits 8kHz signal bandwidth into two narrow bands, and different coding schemes are applied to each band. The lower-band signal is coded using the ITU-T G.729/G.729E coder, and the higher-band signal is compressed using a new algorithm based on the gammatone filter bank with an invertible auditory model. Due to the split-band architecture and completely independent coding schemes for each band, the output speech of the decoder can be selected to be a narrowband or wideband according to the channel condition. Subjective tests showed that, for wideband speech and audio signals, the proposed coder at 14.2/18 kbit/s produces superior quality to ITU-T 24 kbit/s G.722.1 with the shorter algorithmic delay.

• The Journal of the Acoustical Society of Korea
• /
• v.19 no.1
• /
• pp.97-102
• /
• 2000

Subband coding is to divide the signal frequency band into a set of uncorrelated frequency bands by filtering and then to encode each of these subbands using a bit allocation rationale matched to the signal energy in that subband. The actual coding of the subband signal can be done using waveform encoding techniques such as PCM, DPCM and vector quantizer(VQ) in order to obtain higher data compression. Most researchers have focused on the error in the quantizer, but not on the overall reconstruction error and its dependence on the filter bank. This paper provides a thorough analysis of subband codecs and further development of optimum filter bank design using vector quantizer. We compute the mean squared reconstruction error(MSE) which depends on N the number of entries in each code book, k the length of each code word, and on the filter bank coefficients. We form this MSE measure in terms of the equivalent quantization model and find the optimum FIR filter coefficients for each channel in the M-band structure for a given bit rate, given filter length, and given input signal correlation model. Specific design examples are worked out for 4-tap filter in 2-band paraunitary filter bank structure. These optimum paraunitary filter coefficients are obtained by using Monte Carlo simulation. We expect that the results of this work could be contributed to study on the optimum design of subband codecs using vector quantizer.

• Journal of Broadcast Engineering
• /
• v.15 no.2
• /
• pp.205-216
• /
• 2010

In this paper, a method of MPEG-2 Transport Stream (TS) multiplexing for Ultra HDTV (UHDTV) and its design and implementation as a SW tool is described. In practice, UHD video may be divided into several HD videos and each video is encoded in parallel. Therefore, it is necessary to synchronize and multiplex multiple bitstreams encoding each HD video for transmitting and storing UHD video. In this paper, it is assumed that 4 HD videos partitioning a UHD spatially are encoded as H.264/AVC and two 5.0 channel audios are encoded by AC-3. Therefore, 4 H.264/AVC elementary streams (ESs) and 2 AC-3 ESs is mainly considered in the TS multiplexing of UHD. For the carriage of H.264/AVC and AC-3 over MPEG-2 TS, PES packetization and TS multiplexing are designed and implemented based on the extended specification of the MPEG-2 Systems and ATSC (Digital audio compressed standard), respectively. The implemented UHD TS multiplexing tool emulates real time HW operation in the time unit corresponding to the duration of one TS packet transmission in a given TS rate. In particular, in order to satisfy the timing model, the buffers defined in the TS System Target Decoder (T-STD) are monitored and their statuses are considered in the scheduling of TS multiplexing. For UHD multiplexing, two kinds of multiplexing structures, which are UHD re-multiplexing and UHD program multiplexing, are implemented and their strength and weakness are investigated. The developed UHD TS multiplexing tool is tested and verified in terms of the syntax and semantics conformance and functionalities by using a commercial analyzer and real-time presentation tools.

• Journal of the Institute of Convergence Signal Processing
• /
• v.11 no.2
• /
• pp.177-182
• /
• 2010

The flow of a universal system-level design methodology consists of system specification, system-level hardware/software partitioning, co-design, co-verification using virtual or physical prototype, and system integration. In the developing process of a hardware component in system, the design phase has been regarded as a phase consuming lots of time and cost. However, the verification phase in which functionality of the designed component is verified has recently been considered as a much important phase. In this paper, the implementation of a verification environment which is based on SystemC infrastructure and verifies the functionality of a hardware component is described. The proposed verification system uses SystemC user-defined channel as communication interface between variables of SystemC module and registers of Verilog module. The functional verification of an UART is performed on the proposed verification system. SystemC provides class library for hardware modeling and has an advantage of being able to design a system consisting hardware and software in higher abstraction level than register transfer level. Source codes of SystemC modules are reusable with a minor adaptation on verifying functionality of another hardware component.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.25 no.1
• /
• pp.10-18
• /
• 2014

In this paper, we propose a new frequency reconfigurable dual-band antenna. By using an electronically compact eighth-mode substrate-integrated-waveguide(EMSIW) resonator, we have designed a compact antenna, which performs dual-band movement by additionally loading a complementary split ring resonator(CSRR) structure. The EMSIW and CSRR structures are designed to satisfy the bandwidths of 1.575 GHz(GPS) and 2.4 GHz(WLAN), respectively. We load the CSRR with a varactor diode to allow a narrow bandwidth and to enable the resonance frequency to continuously vary from 2.4 GHz to 2.5 GHz. Thus, we realize a channel selection function that is used in the WLAN standards. Irrespective of how a varactor diode moves, the EMSIW independently resonates so that the antenna maintains a fixed frequency of the GPS bandwidth even at different voltages. Consequently, as the DC bias voltage changes from 11.4 V to 30 V, the resonance frequency of the WLAN bandwidth continuously changes between 2.38 GHz and 2.5 GHz, when the DC bias voltage changes from 11.4 V to 30 V. We observe that the simulated and the measured S-parameter values and radiation patterns are in good agreement with each other.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.39 no.1
• /
• pp.34-41
• /
• 2002

In the conventional rake receiver structure for the IS-95 CDMA system, each finger has its own time-deskew buffer or FIFO that aligns the multipath signals to the same timing reference in order to combine symbols. This architecture is not a burden to the rake receiver design mainly because of the small number and size of the buffers. However, the number and size of the buffers are significantly increased in the cdma2000 system which adopts multiple carriers and the small spreading gain for a higher rate in data services. In order to decrease the number of buffers, we propose a new model of the time-deskew buffers, which combines the symbols as well as realigns them at the same time. Our architecture reduces the hardware complexity of the buffers by about more than 60% and 70% compared with the conventional one when we consider each rake receiver has three and four independent fingers, respectively. Moreover, the proposed algorithm is very useful not only to the cdma2000 rake receiver but also to the receiver with many fingers in order to increase the BER performance.