• Title/Summary/Keyword: 직렬통신

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Electrical Arc Detection using Artificial Neural Network (인공 신경망을 이용한 전기 아크 신호 검출)

  • Lee, Sangik;Kang, Seokwoo;Kim, Taewon;Lee, Seungsoo;Kim, Manbae
    • Journal of Broadcast Engineering
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    • v.24 no.5
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    • pp.791-801
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    • 2019
  • The serial arc is one of factors causing electrical fires. Over past decades, various researches have been carried out to detect arc occurrences. Even though frequency analysis, wavelet and statistical features have been used, arc detection performance is degraded due to diverse arc waveforms. Therefore, there is a need to develop a method that could increase the feature dimension, thereby improving the detection performance. In this paper, we use variational mode decomposition (VMD) to obtain multiple decomposed signals and then extract statistical features from them. The features from VMD outperform those from no-VMD in terms of detection performance. Further, artificial neural network is employed as an arc classifier. Experiments validated that the use of VMD improves the classification accuracy by up to 4 percent, based on 14,000 training data.

Design of a gate driver driving active balancing circuit for BMSs. (BMS용 능동밸런싱 회로 소자 구동용 게이트 구동 칩 설계)

  • Kim, Younghee;Jin, Hongzhou;Ha, Yoongyu;Ha, Panbong;Baek, Juwon
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.11 no.6
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    • pp.732-741
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    • 2018
  • In order to maximize the usable capacity of a BMS (battery management system) that uses several battery cells connected in series, a cell balancing technique that equips each cell with the same voltage is needed. In the active cell balancing circuit using a multi-winding transformer, a balancing circuit that transfers energy directly to the cell (cell-to-cell) is composed of a PMOS switch and a gate driving chip for driving the NMOS switch. The TLP2748 photocoupler and the TLP2745 photocoupler are required, resulting in increased cost and reduced integration. In this paper, instead of driving PMOS and NMOS switching devices by using photocoupler, we proposed 70V BCD process based PMOS gate driving circuit, NMOS gate driving circuit, PMOS gate driving circuit and NMOS gate driving circuit with improved switching time. ${\Delta}t$ of the PMOS gate drive switch with improved switching time was 8.9 ns and ${\Delta}t$ of the NMOS gate drive switch was 9.9 ns.

Design of a CPW-fed Double-Dipole Quasi-Yagi Antenna (CPW 급전 이중 다이폴 준-야기 안테나 설계)

  • Yeo, Junho;Lee, Jong-Ig
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.22 no.11
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    • pp.1518-1523
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    • 2018
  • A method for designing a DDQYA fed by a CPW is proposed in this paper. The proposed CPW-fed DDQYA consists of two series-connected strip dipoles, a ground reflector, and a strip-pair director. Instead of the conventional microstrip feed line in which the signal line is located on the substrate opposite to the antenna, a CPW is used because CPW is located on the same side with the antenna, and so the fabrication is easy. The strip-pair director is composed of two horizontally-separated strips, and it is added above the second dipole to enhance the gain in the high frequency region. A prototype of the proposed CPW-fed DDQYA is fabricated on an FR4 substrate. The fabricated antenna has a frequency band of 1.66-3.38 GHz(68.3%) for a voltage standing wave ratio < 2, and measured gain ranges 5.0-7.3 dBi over a frequency band of 1.60-2.90 GHz.

A study on AC-powered LED driver IC (교류 구동 LED 드라이버 IC에 관한 연구)

  • Jeon, Eui-Seok;An, Ho-Myoung;Kim, Byungcheul
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.14 no.4
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    • pp.275-283
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    • 2021
  • In this study, a driver IC for an AC-powered LED that can be manufactured with a low voltage semiconductor process is designed and the performances of the driver IC were simulated. In order to manufacture a driver IC that operates directly at AC 220V, a semiconductor manufacturing process that satisfies a breakdown voltage of 500V or higher is required. A semiconductor manufacturing process for a high-voltage device requires a much higher manufacturing cost than a general semiconductor process for a low-voltage device. Therefore, the LED driver IC is designed in series so that it can be manufactured with semiconductor process technology that implements a low-voltage device. This makes it possible to divide and apply the voltage to each LED block even if the input voltage is high. The LED lighting circuit shows a power factor of 96% at 220V. In the pnp transistor circuit, a very high power factor of 99.7% can be obtained, and it shows a very stable operation regardless of the fluctuation of the input voltage.

Design and Making of PWM Control-based AC-DC Converter with Full-Bridge Rectifier (전파 정류기를 가지는 PWM 제어 기반의 AC-DC 컨버터 설계 및 제작)

  • Bum-Soo Choi;Sang-Hyeon Kim;Dong-Ki Woo;Min-Ho Lee;Yun-Seok Ko
    • The Journal of the Korea institute of electronic communication sciences
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    • v.18 no.4
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    • pp.617-624
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    • 2023
  • Recently, miniaturization and low power consumption of electronic products and improved efficiency and power factor improvement have become a matter of great interest. In this paper, an AC-DC converter based on PWM control was designed and made. The AC-DC converter is designed with a structure in which one rectifier circuit and one output voltage control circuit are connected in series. The rectifier circuit is a diode-based single phase full-wave current circuit and the output voltage control circuit is a DC-DC conversion circuit based on PWM control. Arduino was used as the main control device for PWM control, and LCD was configured at the output stage so that the control result could be checked. The error between the output voltage displayed on the oscilloscope and LCD and the target output voltage was confirmed through repeated experiments with the test circuit, and the validity of the proposed design methodology was confirmed by showing an error rate of about 5% based on the oscilloscope measurement value.

Low price type inspection and monitoring system of lithium ion batteries for hybrid vessels (하이브리드 선박용 리튬 배터리의 저가형 감시시스템 구현)

  • Kwon, Hyuk-joo;Kim, Min-kwon;Lee, Sung-geun
    • Journal of Advanced Marine Engineering and Technology
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    • v.40 no.1
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    • pp.28-33
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    • 2016
  • Batteries are used for main power engine in the fields such as mobiles, electric vehicles and unmanned submarines, for starter and lamp driver in general automotive, for emergency electric source in ship. These days, lead-acid and the lithium ion batteries are increasingly used in the fields of the secondary battery, and the lead-acid battery has a low price and safety comparatively, The lithium ion battery has a high energy density, excellent output characteristics and long life, whereas it has the risk of explosion by reacting with moisture in the air. But Recently, due to the development of waterproof, fireproof, dustproof technology, lithium batteries are widely used, particularly, because their usages are getting wider enough to be used as a power source for hybrid ship and electric propulsion ship, it is necessary to manage more strictly. Hybrid ship has power supply units connected to the packets to produce more than 500kWh large power source, and therefore, A number of the communication modules and wires need to implement the wire inspection and monitor system(WIIMS) that allows monitoring server to transmit detecting voltage, current and temperature data, which is required for the management of the batteries. This paper implements a low price type wireless inspection and monitoring system(WILIMS) of the lithium ion battery for hybrid vessels using BLE wireless communication modules and power line modem( PLM), which have the advantages of low price, no electric lines compared to serial communication inspection systems(SCIS). There are state of charge(SOC), state of health(SOH) in inspection parts of batteries, and proposed system will be able to prevent safety accidents because it allows us to predict life time and make a preventive maintenance by checking them at regular intervals.

Design of Multimode Block Cryptosystem for Network Security (네트워크 보안을 위한 다중모드 블록암호시스템의 설계)

  • 서영호;박성호;최성수;정용진;김동욱
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.11C
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    • pp.1077-1087
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    • 2003
  • In this paper, we proposed an architecture of a cryptosystem with various operating modes for the network security and implemented in hardware using the ASIC library. For configuring a cryptosystem, the standard block ciphers such as AES, SEED and 3DES were included. And the implemented cryptosystem can encrypt and decrypt the data in real time through the wired/wireless network with the minimum latency time (minimum 64 clocks, maximum 256 clocks). It can support CTR mode which is widely used recently as well as the conventional block cipher modes such as ECB, CBC and OFB, and operates in the multi-bit mode (64, 128, 192, and 256 bits). The implemented hardware has the expansion possibility for the other algorithms according to the network security protocol such as IPsec and the included ciphering blocks can be operated simultaneously. The self-ciphering mode and various ciphering mode can be supported by the hardware sharing and the programmable data-path. The global operation is programmed by the serial communication port and the operation is decided by the control signals decoded from the instruction by the host. The designed hardware using VHDL was synthesized with Hynix 0.25$\mu\textrm{m}$ CMOS technology and it used the about 100,000 gates. Also we could assure the stable operation in the timing simulation over 100㎒ using NC-verilog.

Correction of Beam Direction Error caused by Frequency Scan Effect in Active Phased Array Antenna for Satellite Communications (위성통신 능동 위상배열 안테나에서 주파수 스캔 효과로 발생하는 빔 지향 오차의 보상)

  • 전순익;오승엽
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.4
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    • pp.413-420
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    • 2003
  • In this paper, the correction method of antenna beam direction errors is introduced which caused by frequency scan effect in active Phased may antenna for satellite communications. The antenna makes the beam directional error from frequency scan effect when it has dual beam may structure with asymmetrical series connection, their frequencies are different and for from each other, their 3dB beamwidth is narrow, and scan range is wide. By proposed equations, estimated beam direction error angles can be calculated and active phase shifter control values also can be calculated to compensate them. In this paper, the active phased array antenna system was fabricated to measure beam direction errors both before and after correction, which has dual beam from 32${\times}$4 main level array and 4${\times}$2 second level array, frequency deviation 500 MHz max.(6.7 %) at 7.25 GHz∼7.75 GHz ranges, 0$^{\circ}$${\pm}$35$^{\circ}$nm ranges, and 35.6 dBi gain with 2.2$^{\circ}$3 dB beam width. Its beam direction error by frequency san effect which was 2.5$^{\circ}$max., was reduced to 0.2$^{\circ}$max. after correction. This was 7 dB improvement of signal loss. The active phased array antenna can accurately track the target satellite for communications by this proposed correction method.

Design Optimization of Differential FPCB Transmission Line for Flat Panel Display Applications (평판디스플레이 응용을 위한 차동 FPCB 전송선 설계 최적화)

  • Ryu, Jee-Youl;Noh, Seok-Ho;Lee, Hyung-Joo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.5
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    • pp.879-886
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    • 2008
  • This paper addresses the analysis and the design optimization of differential interconnects for Low-Voltage Differential Signaling (LVDS) applications. Thanks to the differential transmission and the low voltage swing, LVDS offers high data rates and improved noise immunity with significantly reduced power consumption in data communications, high-resolution display, and flat panel display. We present an improved model and new equations to reduce impedance mismatch and signal degradation in cascaded interconnects using optimization of interconnect design parameters such as trace width, trace height and trace space in differential flexible printed circuit board (FPCB) transmission lines. We have carried out frequency-domain full-wave electromagnetic simulations, time-domain transient simulations, and S-parameter simulations to evaluate the high-frequency characteristics of the differential FPCB interconnects. The 10% change in trace width produced change of approximately 6% and 5.6% in differential impedance for trace thickness of $17.5{\mu}m$ and $35{\mu}m$, respectively. The change in the trace space showed a little change. We believe that the proposed approach is very helpful to optimize high-speed differential FPCB interconnects for LVDS applications.

A Study on Smart Soil Resistance Measuring Device for Safety Characterized Ground Design in Converged Information Technology (ICT 융합 환경에서의 안전 특성화 접지 설계를 위한 스마트 대지 저항 측정 기술에 관한 연구)

  • Kim, Hong-Yong;Shin, Seung-Jung
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.19 no.1
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    • pp.203-209
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    • 2019
  • In this work, a new land-specific resistance measuring device (GM) and a measuring probe (Grounding Rod) are connected to the WENNER quadrant as power-line communication (PLC). In groups of two (P1,P2) probes, five to ten probes are installed in series on the ground at intervals of 1m, 2m, 4m, 8m, and 16m, respectively. If the PLC signal from the GMD is detected by the receiver of the Probe 1 (P1) for measurement, the minute voltage and current for measurement flow from the PSD (power supply) attached to the probe to the ground, and then, through the soil between P1 and P2, enters the Probe 1 (P2). The resistance value is then measured by the principle of voltage drop due to ground resistance. Measure the earth resistance every T seconds up to 1 trillion and store the measured data on the Arduino Server mounted on the main equipment. Stored measurement data can be derived from formulas by Ohm's Law and from inherent resistance (here,). Data obtained in real time will be linked to CDGES programs installed on Main PC, enabling data analysis and real-time monitoring of the ground environment on land. In addition, a three-dimensional display is possible with 3D graph support by identifying seasonal characteristics such as temperature and humidity of land (soils). The limitations of the study will require specific application measures of Test Bed for commercial access to a model that has been developed and operated experimentally.