• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.11a
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• pp.366-366
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• 2004

• Journal of Digital Contents Society
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• v.8 no.3
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• pp.385-391
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• 2007

In this paper, we propose a frequency synchronization algorithm for S-DMT cable modem, which is practicable to the next-generation high capacity upstream physical layer in HFC networks. Analyzing several viable frequency synchronization algorithms of multicarrier systems, we proposed an algorithm using predetermined training sequence of repeated pattern in preamble field and residual frequency offset compensation with pilot signals. We verified that the simulation results of the proposed algorithm in AWGN showed good performance and suitability to the S-DMT upstream cable modem for fast frequency synchronization.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.4
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• pp.421-427
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• 2004

A low cost solution employing harmonic oscillation to the frequency synthesizer at 5.8 ㎓ is proposed. The proposed frequency synthesizer is composed of 2.9 ㎓ PLL chip, 2.9 ㎓ oscillator, and 5.8 ㎓ buffer amplifier The measured data shows a frequency Outing range of 290 ㎒, ranging from 5.65 to 5.94 ㎓ about 0.5 ㏈m of output power, and a phase noise of -107.67 ㏈c/㎐ at the 100 ㎑ offset frequency. All spurious signals including fundamental oscillation power(2.9 ㎓) are suppressed at least 15 ㏈c than the desired second harmonic signal.

• Journal of Advanced Navigation Technology
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• v.11 no.1
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• pp.9-16
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• 2007

In this paper, the Bit Error Ratio (BER) performances of the D8PSK modulation schemes for VDL Mode-2 are analyzed according to the matched and unmatched cases of the channel filters. The carrier frequency and phase offset effects are analyzed with unmatched case. Generally in digital transmission techniques, the Root Raised Cosine filters which are used as channel filters are applied to both sides at transmitter and receiver in order to achieve no ISI, but in VDL Mode-2, the Raised Cosine Filter is used only in transmission section and the receiver section uses general low pass filter, therefore we could not achieve ISI reduction effects but can have better spectrum quality. From the simulation results, the error probability is increased slightly (1~2dB) with use of un-matched channel filter, we got the conclusions that carrier phase offset do not effect to bit error ratio, but the frequency offset effect is so serious. Finally, narrow band D8PSK modulation signals are generated by the use of Digital Up-Converter and then its features are compared with analog modulator.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11A
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• pp.912-920
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• 2003

This paper is about the design of a small wide-band slot loop antenna, which consists of dual offset-fed and rectangular loop within the slot on a substrate. The proposed antenna is a novel structure generating a multi-resonances due to three geometrical resonance structures. The impedance matching of this antenna can be accomplished by changing the offset position of dual-fed at resonance frequencies. In this experiment, the slot of a fabricated antenna has a center frequency of 6.755㎓, 12.5mm${\times}$50mm in size and the rectangular loop has 10.5mm${\times}$27.5mm in size. The measured result is fractional bandwidth 63.21% with VSWR 2:1, which is agreed with the simulated result within 5% of error, and the maximum antenna gain is 7.42㏈i.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.9
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• pp.3428-3434
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• 2010

In this paper, we proposed and implemented a quality measurement algorithm for IS-95 reverse-link signal. To measure the quality of the received signal, equalization, carrier frequency/phase offset estimation, and timing synchronization are essential. And, all signal processing are carried out with baseband signal. The equalizer works with 4-oversampled samples to remove ICI(InterChip Interference). The frequency/phase offset estimator is followed by timing synchronizer since it can work without aid of data and timing information. As the number of interpolation in timing synchronization increases, the measurement accuracy improves, but computation load increases simultaneously. Therefore, one need to choose adequately the number of interpolation regarding to the platform performance to be used for the proposed algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.9A
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• pp.714-721
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• 2005

In this parer, we analyze the preamble model in the OFDMA/TDD(OFDM-FDMA/Time Division Duplexing). Besides, under AWGN, ITU-R M.1225 Ped-B and Veh-A channel environments, we analyze capabilities of symbol timing & carrier frequency offset and performance of cell searching capabilities applied to OFDM/TDD system through computer simulation. The performance using Detection Probability, False Alarm Probability, Missing Probability, Mean Acquisition Time and MSE(Mean Square Error) is analyzed. Especially, in the case of symbol timing offset estimation, the preamble structure and its algorithm with enhanced performance are proposed and then compared with existing ones.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1998.11a
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• pp.383-388
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• 1998

본 논문에서는 LMDS(Local Multipoint Distributed Services) 시스템의 역방향 채널에서 TDMA(Time Division Multiple Access) 방식으로 ATM(Asynchronous Transfer Mode) 셀을 효율적으로 전송하기 위해 전치부호를 줄일 수 있는 블록복조 알고리즘을 적용한 $\pi$/4 QPSK 변복조 방식 시스템을 제안하고, 블록복조의 동기성능을 향상시키기 위해 새로운 반송파 동기회로를 설계하였다. 제안한 블록동기복조 알고리즘을 적용한 $\pi$/4 QPSK 변복조 방식 시스템은 LMDS 환경에서 ATM 셀 단위의 버스트 데이터로 반송파 위상동기, 심벌 타이밍 동기, 슬롯 타이밍 동기 둥을 수행할 때 전치부호를 아주 적게 사용하므로 효율적인 프레임 전송을 얻어질 수 있도록 하고 있다. 제안한 방식의 성능평가를 위한 모의실험은 LMDS 채널환경과 프레임 구조의 버스트 모드 전송환경에서 심벌 타이밍 동기, 주파수 오프셋, 반송파 위상동기, 페이딩 채널에 따라 수행하였다. 본 논문에서 제안한 블록동기복조 알고리즘을 적용한 $\pi$/40 QPSK 변복조 방식 시스템을 모의수행을 통하여 분석한 결과, 페이딩 환경에서 심벌 타이밍 동기, 주파수 오프셋, 반송파 위상동기할 때 전치부호를 아주 적게까지 줄이더라도 좋은 성능을 발휘함을 확인할 수 있었다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.3A
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• pp.254-259
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• 2010

In this paper, we propose a low-complexity carrier frequency offset (CFO) estimation algorithm for OFDM based wireless LAN, IEEE 802.11a. The complexity of the arctangent operation to calculate the argument of auto-correlation for CFO estimation is reduced by a novel range pointer method. The proposed algorithm estimates fine CFO value first and then based on the fine CFO value, simple criteria is used for the boundary decision of integer CFO estimation. The simulation results show that the performance of the proposed algorithm is slightly better than the conventional method while the computational complexity is reduced by 50%. Furthermore, the proposed method can be easily implemented for the low complex next generation MIMO-OFDM based WLAN systems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.6
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• pp.1510-1521
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• 1996

This paper presents acquisition algorithm and an improved detection technique for the DS/CDMA (direction sequence code division multiple access) RAKE receiver in multipath fading channel. The DS/CDMA systems use the RAKE receiver, an accurate code acquisition is required for the RAKE branches. The algorithmis able to findthe pseudonoise (PN) code delay estimates for the RAKE branches in a multipath fading channel. In this paper a numerical method and computer simulation simulation have been developed for the acquisition system. The detection probability and mean acquisition time are investigated asa performance measure of the system using the Monte Carlo method. And also in order to analyze the effect of the acquisition on the RAKE receiver this paper bring out the effect of integration time, doppler frequency, processing gain and the number of users on the acquired code phase.