• Title/Summary/Keyword: 전압 발생기

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The Variation of Density and Settlement for Contaminated Sediments During Electrokinetic Sedimentation and Remediation Processes (오염퇴적토에 대한 동전기적 침전 및 정화 공정에서의 시료 밀도 및 침하 변화 특성)

  • Chung, Ha-Ik
    • Journal of the Korean Geotechnical Society
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    • v.22 no.9
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    • pp.5-14
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    • 2006
  • Generally, the sediments contain significant water, clay, colloidal fraction and contaminants, and can result in soft strata with high initial void, and its potential hazards in subsurface environments exist. Electrokinetic technique has been used in sedimentation for volume reduction of slurry tailing wastes and in remediation for extraction of contaminants from contaminated soils. In this research, the coupled effects of sedimentation and remediation of contaminated sediments are focused using electrokinetic sedimentation and remediation techniques from experimental aspects. A series of laboratory experiments including variable conditions such as initial solid content of the specimen, concentration level of the contaminant, and magnitude of applied voltage are performed with the contaminated sediment specimens mixed with ethylene glycol. Commercially available high specification Kaolin was used to simulate slurried sediment. From the test results, the settlement of specimen increases with increasing of applied voltage and decreasing of solid content and contamination level. The density of specimen increases due to settlement of specimen in the process of electrokinetic sedimentation and decreases due to extraction of organic contaminant in the process of electrokinetic remediation.

Individual Order Intermodulation Distortion Generator Using Series Feedback of Diode and Its Application (다이오드 직렬 궤환을 이용한 개별 차수 혼변조 발생기 및 응용)

  • Son, Kang-Ho;Kim, Seung-Hwan;Kim, Ell-Kou;Kim, Young;Yoon, Young-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.10
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    • pp.1096-1103
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    • 2008
  • This paper proposes an individual order predistortion linearizer using intermodulation distortion(IMD) generator for cancellation the third and the fifth IMD of power amplifier. The IMD generator for controlling the third and the fifth IMD consist of common Emitter amplifier and Schottky diode. These signals are generated by series feedback of Schottky diode to obtain the inverse AM/AM and AM/PM characteristics of power amplifier. The individual order predistorters are consisted of individual IMD generator, power splitter and combiner. The test results show that the third and the fifth IMD can be improved by a maximum 13.5 dB and 0.9 dB in case of CW 2-tone signals. Also, the Adjacent Channel Leakage Ratio(ACLR) can be improved 2.3 dB, 2.5 dB at ${\pm}0.885$ MHz, ${\pm}1.23$ MHz offset frequency for CD-MA IS-95 2FA signals.

A Design of Gate Driver Circuits in DMPPT Control for Photovoltaic System (태양광 분산형 최대전력점 추적 제어를 위한 고전압 게이트 드라이버 설계)

  • Kim, Min-Ki;Lim, Shin-Il
    • Journal of Korea Society of Industrial Information Systems
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    • v.19 no.3
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    • pp.25-30
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    • 2014
  • This paper describes the design of gate driver circuits in distributed maximum power point tracking(DMPPT) controller for photovoltaic system. For the effective DMPPT control in the existence of shadowed modules, high voltage gate driver is applied to drive the DC-DC converter in each module. Some analog blocks such as 12-b ADC, PLL, and gate driver are integrated in the SoC for DMPPT. To reduce the power consumption and to avoid the high voltage damage, a short pulse generator is added in the high side level shifter. The circuit was implemented with BCDMOS 0.35um technology and can support the maximum current of 2A and the maximum voltage of 50V.

Development of Ultrasound Sector B-Scanner(I)-Front End Hardware Part- (초음파 섹터 B-스캐너의 개발(I)-프론트 엔드 부분-)

  • 권성재;박종철
    • Journal of Biomedical Engineering Research
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    • v.7 no.1
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    • pp.59-66
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    • 1986
  • A prototype ultrasound sector B-scanner has been developed where the front-end hardware refers to all the necessary circuits for transmitting the ultrasound pulses into the human body and receiving the reflected echo signals from it. The front-end hardware can generally be divided into three parts, i.e., a pulse generator for insonification, a receiver which is responsible for processing of low-level analog signals, and a steering controller for driving the mechanical sector probe whose functions and design concepts are described in this paper. The front-end hardware is implemented which incorporates the following features: improvement of the axial resolution using a circuit which reduces the ring-down time, flexibility of generating time-gain compensation curve, and adoption of a one-chip microcomputer for generating the rate pulses based on the sensor output waveforms.

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Design of High Speed VRAM ASIC for Image Signal Processing (영상 신호처리를 위한 고속 VRAM ASIC 설계)

  • Seol, Wook;Song, Chang-Young;Kim, Dae-Soon;Kim, Hwan-Yong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.6
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    • pp.1046-1055
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    • 1994
  • In this paper, to design high speed 1 line VRAM(Video RAM) suitable for image signal processing with ASIC(Application Specific IC) method, the VRAM memory core has been designed using 3-TR dual-port dynamic cell which has excellent access time and integration characteristics. High speed pipeline operation was attained by separating the first row from the subarray 1 memory core and the simultaneous I/Q operation for a selected single address was made possible by adopting data-latch scheme. Peripheral circuits were designed implementing address selector and 1/2V voltage generator. Integrated ASIC has been optimized using 1.5[ m] CMOS design rule.

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Design of the Single-loop Voltage Controller for Arbitrary Waveform Generator (임의 파형 발생기를 위한 단일 루프 전압 제어기 설계)

  • Kim, Hyeon-Sik;Chee, Seung-Jun;Sul, Seung-Ki
    • The Transactions of the Korean Institute of Power Electronics
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    • v.21 no.1
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    • pp.58-64
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    • 2016
  • This study presents a design method for a single-loop voltage controller that is suitable for an arbitrary waveform generator (AWG). The voltage control algorithm of AWG should ensure high dynamic performance and should attain sufficient robustness to disturbances such as inverter nonlinearity, sensor noise, and load current. By analyzing the power circuit of AWG, control limitation and control target are presented to improve the dynamic performance of AWG. The proposed voltage control algorithm is composed of a single-loop output voltage control, an inverter current feedback term to improve transient response, and a load current feedforward term to prevent voltage distortion. The guideline for setting control gain is presented based on output filter parameters and digital time delay. The performance of the proposed algorithm is proven by experimental results through comparison with the conventional algorithm.

Frequency Relay for a Power System Using the Digital Phase Locked Loop (디지털 위상 고정 루프를 이용한 계전기용 주파수 측정 장치)

  • Yoon, Young-Seok;Choi, Il-Heung;Lee, Sang-Yoon;Hwang, Dong-Hwan;Lee, Sang-Jeong;Jang, Su-Hyeong;Lee, Byung-Jin;Park, Jang-Soo;Jeong, Yeong-Ho
    • Proceedings of the KIEE Conference
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    • 2003.07a
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    • pp.564-566
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    • 2003
  • 전력 계통에서 안정한 전력을 공급하는 것은 매우 중요하다. 전력 계통의 오류는 전압 및 주파수를 감시함으로써 검출 가능하다. 본 논문에서는 디지털 위상 고정 루프를 이용한 전력 계통의 주파수 측정 장치를 제안하고 이를 구현한 결과를 제시하고자 한다. 제안한 주파수 측정 장치는 위상 고정 루프의 기본요소로 구성된다. 위상분별기는 배타적 논리연산을 통해 위상오차를 검출하고 위상의 앞섬 및 뒤짐의 검출이 가능하도록 설계하였으며, 전력 계통의 주파수 동특성을 고려해서 3차의 루프 필터를 설계하였다. DCO는 출력 주파수의 분해능을 고려하여 입력 신호를 정확하게 추정할 수 있도록 설계하였다. 제안한 주파수 측정 장치의 성능을 검증하기 위하여 모의실험을 통해 주파수 변동량의 측정 범위 및 정확도를 검토하였으며, FPGA와 CPU를 포함하는 하드웨어를 구현하였다. FPGA에는 Verilog HDL로 디지털 위상 고정 루프의 위상분별기와 DCO를 구현하였으며 루프필터는 소프트웨어로 구현하였다. 제안한 디지털 위상 고정 루프의 성능 검증을 위해 정밀한 함수 발생기의 출력을 인가한 후 출력 주파수를 측정한 결과 및 전력 계통에 대한 실험 결과를 제시하였다.

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Improvement of Signal Processing Circuit for Inspecting Cracks on the Express Train Wheel (고속 신호처리 회로에 의한 고속철도 차륜검사)

  • Hwang, Ji-Seong;Lee, Jin-Yi;Kwon, Suk-Jin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.05a
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    • pp.579-584
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    • 2008
  • A novel nondestructive testing (NDT) system, which is able to detect a crack with high speed and high spatial resolution, is urgently required for inspecting small cracks on express train wheels. This paper proposes an improved signal processing circuits, which uses the multiple amplifying circuits and the crack indicating pulse output system of the previous scan-type magnetic camera. Hall sensors are arrayed linearly, and the wheel is rotated with static speed in the vertical direction to sensor array direction. Each Hall voltages are amplified, converted and immediately operated by using, amplifying circuits, analog-to-digital converters and $\mu$-processor, respectively. The operated results, ${\partial}V_H/{\partial}t$, are compared with a standard value, which indicates a crack existence. If the ${\partial}V_H/{\partial}t$ is larger than standard value, the pulse signal is output, and indicates the existence of crack. The effectiveness of the novel method was verified by examine using cracks on the wheel specimen model.

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Development of Catenary Arc Detection System (전차선 아크 검측 시스템 개발)

  • Song, Sung-Gun;Lee, Teak-Hee;Cho, Seong-Jae;Moon, Chul-Yi;Park, Seong-Mo
    • Journal of the Korean Society for Railway
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    • v.13 no.1
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    • pp.37-43
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    • 2010
  • Catenary (Overhead Contact Lines) and Pantograph are used to transmit electrical energy to electric railways. An Arc occurs by unstable contact between catenary and pantograph during electric railways operation, which causes malfunctioning or even an accident. Therefore, to prevent a arc or electric contact loss are required arc detection systems with catenary maintenance capability. This paper describes developing of catenary arc detection system using photo detector in order to detect arc incidence in a indirect way. This developed system can also achieve Video-recordings and environmental conditions such as wire voltage/current, pantograph height, speed, position of electric railways, and temperature/humidity. This system have been evaluated at the section that bounds for dongdaegu from seoul. From the experimental results, the occurrence of arc and intensity of arc are mainly effected by wire voltage/current, pantograph height and speed of electric railways.

The Design of Broadband Ultrasonic Transducers for Fish Species Identification - Dual Resonance Design of a Ultrasonic Transducer Using a Single Acoustic Matching Layer - (어종식별을 위한 광대역 초음파 변환기의 설계 II - 단일음향정합층을 이용한 이중공진형 변환기의 설계 -)

  • 이대재
    • Journal of the Korean Society of Fisheries and Ocean Technology
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    • v.34 no.1
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    • pp.74-84
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    • 1998
  • A doubly resonant ultrasonic transducer has been designed as an attempt to increase the bandwidth of underwater transducers. The dual resonance conditions were accomplished by attaching a single acoustic matching layer on the front face of a Tonpilz transducer consisted of an aluminum head, a piezoelectric ring, a brass tail and a prestress bolt. A modified Mason's model was used for the performance analysis and the design of transducers, and the constructed transducers were tested experimentally and numerically by changing the impedances and thicknesses of the head, tail and matching layers in the water tank. Two distinct resonance peaks in the transmitting voltage response(TVR) of a developed transducer were observed at 34.3 and 40.4 kHz, respectively, with the difference frequency of 6.1kHz and the center frequency of 37.2kHz. The values of TVR at these frequencies were 136.5 dB re $1\;\muPa/V$ at 34.3 kHz and 136.8 dB re $1\;\muPa/V$ at 40.4 kHz, respectively. Reasonable agreement between the experimental results and the numerical results was achieved. From this result, it is expected that the generation of the distinct resonances at any two desired frequencies can be achieved through the proper choice of the matching layer to provide the impedance transformation between the transducer and the medium.

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